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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-11-13 21:18:21 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-11-13 21:18:21 +0000 |
| commit | bcb34ac2ea6c7232a86f6da569afe3d6dbccd7c4 (patch) | |
| tree | d2011b76c57899a48bfb716d6097dcc660c478aa /llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll | |
| parent | c2078fb1c8b63557d3b78af4b8897c617b1804df (diff) | |
| download | bcm5719-llvm-bcb34ac2ea6c7232a86f6da569afe3d6dbccd7c4.tar.gz bcm5719-llvm-bcb34ac2ea6c7232a86f6da569afe3d6dbccd7c4.zip | |
[AMDGPU] combine extractelement into several selects
An extractelement with non-constant index will be lowered either to
scratch or movrel loop in most cases. This patch converts such
instruction into a set of selects if vector size is not too big.
Differential Revision: https://reviews.llvm.org/D54351
llvm-svn: 346800
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll b/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll index 0241490de7a..1c92f74ec4b 100644 --- a/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll +++ b/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll @@ -51,8 +51,7 @@ define amdgpu_kernel void @trunc_i16_bitcast_v2i16(i16 addrspace(1)* %out, <2 x ; t21: v2i32,ch = load<LD8[%in(addrspace=1)]> t12, t10, undef:i64 ; t23: i64 = bitcast t21 ; t30: i16 = truncate t23 -; SI: buffer_load_dword v[[VAL:[0-9]+]] -; VI: buffer_load_dwordx2 v{{\[}}[[VAL:[0-9]+]] +; GCN: buffer_load_dword v[[VAL:[0-9]+]] ; GCN: buffer_store_short v[[VAL]], off define amdgpu_kernel void @trunc_i16_bitcast_v4i16(i16 addrspace(1)* %out, <4 x i16> addrspace(1)* %in) { %ld = load <4 x i16>, <4 x i16> addrspace(1)* %in |
