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author | Wei Ding <wei.ding2@amd.com> | 2017-02-10 02:15:29 +0000 |
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committer | Wei Ding <wei.ding2@amd.com> | 2017-02-10 02:15:29 +0000 |
commit | 205bfdb3e9b0d046c788ae611a80f691058fd9a1 (patch) | |
tree | ff10b51e956e7f73668ba19f99b044f25cfbd941 /llvm/test/CodeGen/AMDGPU/trap.ll | |
parent | 6dec24316b00fcd278430a8b32a7d66189abf71a (diff) | |
download | bcm5719-llvm-205bfdb3e9b0d046c788ae611a80f691058fd9a1.tar.gz bcm5719-llvm-205bfdb3e9b0d046c788ae611a80f691058fd9a1.zip |
AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010
llvm-svn: 294692
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/trap.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/trap.ll | 77 |
1 files changed, 73 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/trap.ll b/llvm/test/CodeGen/AMDGPU/trap.ll index 4271a499c9c..5c3e1ee0b3f 100644 --- a/llvm/test/CodeGen/AMDGPU/trap.ll +++ b/llvm/test/CodeGen/AMDGPU/trap.ll @@ -1,11 +1,80 @@ -; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN %s +; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-TRAP %s + +; RUN: llc -mtriple=amdgcn--amdhsa -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s +; RUN: llc -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-HSA-TRAP %s +; RUN: llc -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s + +; enable trap handler feature +; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=TRAP-BIT -check-prefix=MESA-TRAP %s +; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=TRAP-BIT %s + +; disable trap handler feature +; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=NO-TRAP-BIT -check-prefix=NOMESA-TRAP %s +; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=NO-TRAP-BIT %s + +; RUN: llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s declare void @llvm.trap() #0 +declare void @llvm.debugtrap() #0 + +; MESA-TRAP: .section .AMDGPU.config +; MESA-TRAP: .long 47180 +; MESA-TRAP-NEXT: .long 208 + +; NOMESA-TRAP: .section .AMDGPU.config +; NOMESA-TRAP: .long 47180 +; NOMESA-TRAP-NEXT: .long 144 + +; GCN-LABEL: {{^}}hsa_trap: +; HSA-TRAP: enable_trap_handler = 1 +; HSA-TRAP: s_mov_b64 s[0:1], s[4:5] +; HSA-TRAP: s_trap 1 + +; for llvm.trap in hsa path without ABI, direct generate s_endpgm instruction without any warning information +; NO-HSA-TRAP: enable_trap_handler = 0 +; NO-HSA-TRAP: s_endpgm +; NO-HSA-TRAP: COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 + +; TRAP-BIT: enable_trap_handler = 1 +; NO-TRAP-BIT: enable_trap_handler = 0 +; NO-MESA-TRAP: s_endpgm +define void @hsa_trap() { + call void @llvm.trap() + ret void +} + +; MESA-TRAP: .section .AMDGPU.config +; MESA-TRAP: .long 47180 +; MESA-TRAP-NEXT: .long 208 + +; NOMESA-TRAP: .section .AMDGPU.config +; NOMESA-TRAP: .long 47180 +; NOMESA-TRAP-NEXT: .long 144 + +; GCN-WARNING: warning: <unknown>:0:0: in function hsa_debugtrap void (): debugtrap handler not supported +; GCN-LABEL: {{^}}hsa_debugtrap: +; HSA-TRAP: enable_trap_handler = 1 +; HSA-TRAP: s_mov_b64 s[0:1], s[4:5] +; HSA-TRAP: s_trap 2 + +; for llvm.debugtrap in non-hsa path without ABI, generate a warning and a s_endpgm instruction +; NO-HSA-TRAP: enable_trap_handler = 0 +; NO-HSA-TRAP: s_endpgm + +; TRAP-BIT: enable_trap_handler = 1 +; NO-TRAP-BIT: enable_trap_handler = 0 +; NO-MESA-TRAP: s_endpgm +define void @hsa_debugtrap() { + call void @llvm.debugtrap() + ret void +} +; For non-HSA path ; GCN-LABEL: {{^}}trap: -; GCN: v_mov_b32_e32 v0, 1 -; GCN: s_mov_b64 s[0:1], s[4:5] -; GCN: s_trap 1 +; TRAP-BIT: enable_trap_handler = 1 +; NO-TRAP-BIT: enable_trap_handler = 0 +; NO-HSA-TRAP: s_endpgm +; NO-MESA-TRAP: s_endpgm define void @trap() { call void @llvm.trap() ret void |