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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-01 12:08:55 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-01 12:08:55 +0000 |
| commit | e017ed32450573c16e981b91e16a883299fee59a (patch) | |
| tree | afaa1f7a4e237f62145dd9384a5d029ac10ce9ca /llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | |
| parent | 0c5d6ccbfc089b3335a78d910febff44c3dd622c (diff) | |
| download | bcm5719-llvm-e017ed32450573c16e981b91e16a883299fee59a.tar.gz bcm5719-llvm-e017ed32450573c16e981b91e16a883299fee59a.zip | |
[SelectionDAG] Improve SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
D52935 introduced the ability for SimplifyDemandedBits to call SimplifyDemandedVectorElts through BITCASTs if the demanded bit mask entirely covered the sub element.
This patch relaxes this to demanding an element if we need any bit from it.
Differential Revision: https://reviews.llvm.org/D54761
llvm-svn: 348073
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll b/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll index 23341aab56b..13380e03e32 100644 --- a/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll +++ b/llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll @@ -76,20 +76,19 @@ define amdgpu_kernel void @local_store_i55(i55 addrspace(3)* %ptr, i55 %arg) #0 ; GFX9: ; %bb.0: ; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s5 -; GFX9-NEXT: v_mov_b32_e32 v2, 0 -; GFX9-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:14 +; GFX9-NEXT: global_load_ubyte_d16_hi v0, v[0:1], off offset:14 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s1, s[4:5], 0x8 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0xc ; GFX9-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-NEXT: v_mov_b32_e32 v3, s1 -; GFX9-NEXT: v_mov_b32_e32 v1, s2 -; GFX9-NEXT: ds_write_b16 v0, v1 offset:4 +; GFX9-NEXT: v_mov_b32_e32 v2, s2 +; GFX9-NEXT: ds_write_b16 v1, v2 offset:4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_and_b32_e32 v1, 0x7f0000, v2 -; GFX9-NEXT: ds_write_b8_d16_hi v0, v1 offset:6 -; GFX9-NEXT: ds_write_b32 v0, v3 +; GFX9-NEXT: v_and_b32_e32 v0, 0x7f0000, v0 +; GFX9-NEXT: ds_write_b8_d16_hi v1, v0 offset:6 +; GFX9-NEXT: ds_write_b32 v1, v3 ; GFX9-NEXT: s_endpgm store i55 %arg, i55 addrspace(3)* %ptr, align 8 ret void |
