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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-29 02:25:14 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-29 02:25:14 +0000 |
| commit | 9a7e29ae910a788f230b42f3f59b3b9fcdc019e3 (patch) | |
| tree | 208cc164397689254508a627ed403d6c634cb943 /llvm/test/CodeGen/AMDGPU/smrd.ll | |
| parent | 09b53f6fd8bcec00a09c98e5cc2040ccfb32cf85 (diff) | |
| download | bcm5719-llvm-9a7e29ae910a788f230b42f3f59b3b9fcdc019e3.tar.gz bcm5719-llvm-9a7e29ae910a788f230b42f3f59b3b9fcdc019e3.zip | |
AMDGPU: Use stricter regexes for add instructions
Match the entire _co as one optional piece rather than
a set of characters to match multiple times.
llvm-svn: 319275
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/smrd.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/smrd.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/smrd.ll b/llvm/test/CodeGen/AMDGPU/smrd.ll index 5220c26803c..e6635d113ec 100644 --- a/llvm/test/CodeGen/AMDGPU/smrd.ll +++ b/llvm/test/CodeGen/AMDGPU/smrd.ll @@ -204,7 +204,7 @@ main_body: ; GCN-LABEL: {{^}}smrd_vgpr_offset_imm_too_large: ; GCN-NEXT: BB# -; GCN-NEXT: v_add_{{[_coiu]*}}32_e32 v0, vcc, 0x1000, v0 +; GCN-NEXT: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 0x1000, v0 ; GCN-NEXT: buffer_load_dword v{{[0-9]}}, v0, s[0:3], 0 offen ; define amdgpu_ps float @smrd_vgpr_offset_imm_too_large(<4 x i32> inreg %desc, i32 %offset) #0 { main_body: |
