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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-08 19:03:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-08 19:03:20 +0000 |
| commit | 3c7581bbebbb339a850e18733874a665e1def2d8 (patch) | |
| tree | 3e4bc93e3f73e5bdfa28bfd20db266c7cc78e3e2 /llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | |
| parent | 6a38cc6d67da5568d5aa37abce66e2d13ccd75a7 (diff) | |
| download | bcm5719-llvm-3c7581bbebbb339a850e18733874a665e1def2d8.tar.gz bcm5719-llvm-3c7581bbebbb339a850e18733874a665e1def2d8.zip | |
AMDGPU: Use correct register names in inline assembly
Fixes using physical registers in inline asm from clang.
llvm-svn: 305004
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/skip-if-dead.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/skip-if-dead.ll b/llvm/test/CodeGen/AMDGPU/skip-if-dead.ll index 3f53572ab44..ea8b87f1dee 100644 --- a/llvm/test/CodeGen/AMDGPU/skip-if-dead.ll +++ b/llvm/test/CodeGen/AMDGPU/skip-if-dead.ll @@ -79,7 +79,7 @@ define amdgpu_ps void @test_kill_depth_var_x2(float %x, float %y) #0 { ; CHECK-NEXT: s_endpgm define amdgpu_ps void @test_kill_depth_var_x2_instructions(float %x) #0 { call void @llvm.AMDGPU.kill(float %x) - %y = call float asm sideeffect "v_mov_b32_e64 v7, -1", "={VGPR7}"() + %y = call float asm sideeffect "v_mov_b32_e64 v7, -1", "={v7}"() call void @llvm.AMDGPU.kill(float %y) ret void } @@ -128,7 +128,7 @@ bb: v_nop_e64 v_nop_e64 v_nop_e64 - v_nop_e64", "={VGPR7}"() + v_nop_e64", "={v7}"() call void @llvm.AMDGPU.kill(float %var) br label %exit @@ -186,11 +186,11 @@ bb: v_nop_e64 v_nop_e64 v_nop_e64 - v_nop_e64", "={VGPR7}"() - %live.across = call float asm sideeffect "v_mov_b32_e64 v8, -1", "={VGPR8}"() + v_nop_e64", "={v7}"() + %live.across = call float asm sideeffect "v_mov_b32_e64 v8, -1", "={v8}"() call void @llvm.AMDGPU.kill(float %var) store volatile float %live.across, float addrspace(1)* undef - %live.out = call float asm sideeffect "v_mov_b32_e64 v9, -2", "={VGPR9}"() + %live.out = call float asm sideeffect "v_mov_b32_e64 v9, -2", "={v9}"() br label %exit exit: @@ -242,7 +242,7 @@ bb: v_nop_e64 v_nop_e64 v_nop_e64 - v_nop_e64", "={VGPR7}"() + v_nop_e64", "={v7}"() call void @llvm.AMDGPU.kill(float %var) %vgpr = load volatile i32, i32 addrspace(1)* undef %loop.cond = icmp eq i32 %vgpr, 0 |
