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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-12-19 01:46:41 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-12-19 01:46:41 +0000 |
| commit | 2aed6ca1d33468f7e6f8509213a1b9dcd8026ec1 (patch) | |
| tree | a4575401ecb619e067cc2b4fed2a83056b80163c /llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | |
| parent | 10a509292cda51aabf3630bf30ceb990d3bf3108 (diff) | |
| download | bcm5719-llvm-2aed6ca1d33468f7e6f8509213a1b9dcd8026ec1.tar.gz bcm5719-llvm-2aed6ca1d33468f7e6f8509213a1b9dcd8026ec1.zip | |
AMDGPU: Switch barrier intrinsics to using convergent
noduplicate prevents unrolling of small loops that happen to have
barriers in them. If a loop has a barrier in it, it is OK to duplicate
it for the unroll.
llvm-svn: 256075
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll b/llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll index 35e9ff83463..bc766dbcac6 100644 --- a/llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll +++ b/llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll @@ -234,4 +234,4 @@ define void @reorder_global_offsets(i32 addrspace(1)* nocapture %out, i32 addrsp attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } attributes #1 = { "ShaderType"="1" nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } -attributes #2 = { nounwind noduplicate } +attributes #2 = { nounwind convergent } |
