diff options
| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-04-06 19:40:20 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-04-06 19:40:20 +0000 |
| commit | df3a20cd8068c732a0b26bdf8c1857c7d97104b4 (patch) | |
| tree | 11974d0749ffa9d399f72a66fd5787d6ec248103 /llvm/test/CodeGen/AMDGPU/si-spill-cf.ll | |
| parent | 1b6188d2f865366ef94d65b65596f47c9196c20c (diff) | |
| download | bcm5719-llvm-df3a20cd8068c732a0b26bdf8c1857c7d97104b4.tar.gz bcm5719-llvm-df3a20cd8068c732a0b26bdf8c1857c7d97104b4.zip | |
AMDGPU: Add a shader calling convention
This makes it possible to distinguish between mesa shaders
and other kernels even in the presence of compute shaders.
Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Differential Revision: http://reviews.llvm.org/D18559
llvm-svn: 265589
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-spill-cf.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-spill-cf.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll index d407d6eb926..a3b8a12722f 100644 --- a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll +++ b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll @@ -6,7 +6,7 @@ ; SI: s_or_b64 exec, exec, [[SAVED:s\[[0-9]+:[0-9]+\]|[a-z]+]] ; SI-NOT: v_readlane_b32 [[SAVED]] -define void @main() #1 { +define amdgpu_ps void @main() { main_body: %0 = call float @llvm.SI.load.const(<16 x i8> undef, i32 16) %1 = call float @llvm.SI.load.const(<16 x i8> undef, i32 32) @@ -510,5 +510,5 @@ declare float @llvm.maxnum.f32(float, float) #2 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) attributes #0 = { alwaysinline nounwind readnone } -attributes #1 = { "ShaderType"="0" "enable-no-nans-fp-math"="true" } +attributes #1 = { "enable-no-nans-fp-math"="true" } attributes #2 = { nounwind readnone } |
