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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-11 23:35:48 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-11 23:35:48 +0000 |
commit | 45f8216ceecd8e86f4a4217599f25ca01d947dbc (patch) | |
tree | 2504d720aa1472058f52d5b5ce83a6d314409ee0 /llvm/test/CodeGen/AMDGPU/si-spill-cf.ll | |
parent | 002df71dd3bf53dce721a5c117fb00a1102ffd85 (diff) | |
download | bcm5719-llvm-45f8216ceecd8e86f4a4217599f25ca01d947dbc.tar.gz bcm5719-llvm-45f8216ceecd8e86f4a4217599f25ca01d947dbc.zip |
AMDGPU: Remove superfluous string attributes from tests
Also fix v_mac.ll not testing right thing for fneg
llvm-svn: 275129
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-spill-cf.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-spill-cf.ll | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll index a3b8a12722f..30aa2d550f6 100644 --- a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll +++ b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll @@ -6,7 +6,7 @@ ; SI: s_or_b64 exec, exec, [[SAVED:s\[[0-9]+:[0-9]+\]|[a-z]+]] ; SI-NOT: v_readlane_b32 [[SAVED]] -define amdgpu_ps void @main() { +define amdgpu_ps void @main() #0 { main_body: %0 = call float @llvm.SI.load.const(<16 x i8> undef, i32 16) %1 = call float @llvm.SI.load.const(<16 x i8> undef, i32 32) @@ -80,7 +80,7 @@ main_body: LOOP: ; preds = %ENDIF2795, %main_body %temp894.0 = phi float [ 0.000000e+00, %main_body ], [ %temp894.1, %ENDIF2795 ] %temp18.0 = phi float [ undef, %main_body ], [ %temp18.1, %ENDIF2795 ] - %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #2 + %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) %67 = icmp sgt i32 %tid, 4 br i1 %67, label %ENDLOOP, label %ENDIF @@ -490,25 +490,24 @@ ELSE2824: ; preds = %ELSE2821 br label %ENDIF2795 } -declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #2 +declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #1 ; Function Attrs: nounwind readnone -declare float @llvm.SI.load.const(<16 x i8>, i32) #2 +declare float @llvm.SI.load.const(<16 x i8>, i32) #1 ; Function Attrs: nounwind readnone -declare float @llvm.floor.f32(float) #2 +declare float @llvm.floor.f32(float) #1 ; Function Attrs: nounwind readnone -declare float @llvm.sqrt.f32(float) #2 +declare float @llvm.sqrt.f32(float) #1 ; Function Attrs: nounwind readnone -declare float @llvm.minnum.f32(float, float) #2 +declare float @llvm.minnum.f32(float, float) #1 ; Function Attrs: nounwind readnone -declare float @llvm.maxnum.f32(float, float) #2 +declare float @llvm.maxnum.f32(float, float) #1 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) -attributes #0 = { alwaysinline nounwind readnone } -attributes #1 = { "enable-no-nans-fp-math"="true" } -attributes #2 = { nounwind readnone } +attributes #0 = { nounwind } +attributes #1 = { nounwind readnone } |