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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-01-20 21:05:49 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-01-20 21:05:49 +0000
commit15fbe49daf8b08f7e3383963543df823882167ac (patch)
tree6d761eccf1ef80ac013a5bcc45791e8b62725ff0 /llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
parent7cccd2672e1a063a843654ace3959be3da1318d6 (diff)
downloadbcm5719-llvm-15fbe49daf8b08f7e3383963543df823882167ac.tar.gz
bcm5719-llvm-15fbe49daf8b08f7e3383963543df823882167ac.zip
AMDGPU: Remove AMDIL.fraction intrinsic
llvm-svn: 258347
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-spill-cf.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/si-spill-cf.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
index 4b2d8ec6bf0..2cb919f1634 100644
--- a/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
@@ -256,7 +256,7 @@ ELSE2584: ; preds = %IF2565
ENDIF2582: ; preds = %ELSE2584, %IF2565
%213 = fadd float %1, undef
%214 = fadd float 0.000000e+00, %213
- %215 = call float @llvm.AMDIL.fraction.(float %214)
+ %215 = call float @llvm.AMDGPU.fract.f32(float %214)
br i1 undef, label %IF2589, label %ELSE2590
IF2589: ; preds = %ENDIF2582
@@ -479,8 +479,8 @@ ELSE2824: ; preds = %ELSE2821
; Function Attrs: nounwind readnone
declare float @llvm.SI.load.const(<16 x i8>, i32) #1
-; Function Attrs: readnone
-declare float @llvm.AMDIL.fraction.(float) #2
+; Function Attrs: nounwind readnone
+declare float @llvm.AMDGPU.fract.f32(float) #1
; Function Attrs: nounwind readnone
declare float @llvm.sqrt.f32(float) #1
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