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| author | David Stuttard <david.stuttard@amd.com> | 2019-03-12 09:52:58 +0000 |
|---|---|---|
| committer | David Stuttard <david.stuttard@amd.com> | 2019-03-12 09:52:58 +0000 |
| commit | 20ea21c6ede8426be9832d684409a2388e2ca31a (patch) | |
| tree | f092654776b1fb81f341dc7fad60ebf668d4d0ed /llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | |
| parent | 31ff647c1d261364e716e6b607065b6ecce4ca1f (diff) | |
| download | bcm5719-llvm-20ea21c6ede8426be9832d684409a2388e2ca31a.tar.gz bcm5719-llvm-20ea21c6ede8426be9832d684409a2388e2ca31a.zip | |
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir index 3a1914c7936..5ae4620157d 100644 --- a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir +++ b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir @@ -13,12 +13,12 @@ body: | ; GCN: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 16, 0 ; GCN: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 [[S_LOAD_DWORD_IMM]], 255, implicit-def $scc ; GCN: [[S_AND_B32_1:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 65535, [[S_AND_B32_]], implicit-def $scc - ; GCN: S_ENDPGM + ; GCN: S_ENDPGM 0 %0:sgpr_64 = COPY $sgpr4_sgpr5 %1:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 16, 0 %2:sreg_32_xm0 = S_AND_B32 %1, 255, implicit-def $scc %3:sreg_32_xm0 = S_AND_B32 65535, %2, implicit-def $scc - S_ENDPGM + S_ENDPGM 0 ... --- @@ -37,7 +37,7 @@ body: | ; GCN: bb.1: ; GCN: successors: %bb.2(0x80000000) ; GCN: bb.2: - ; GCN: S_ENDPGM + ; GCN: S_ENDPGM 0 bb.0: successors: %bb.1, %bb.2 @@ -48,6 +48,6 @@ body: | successors: %bb.2 bb.2: - S_ENDPGM + S_ENDPGM 0 ... |
