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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-20 18:24:21 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-20 18:24:21 +0000 |
| commit | a0342dc9eb9fe66e6287bdc3c0c0fa00deae652a (patch) | |
| tree | 63acfa36f2f66b449ebfef7f01e797ee6f19afee /llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll | |
| parent | 60cc1d3218fcecef98d307cee1a197d4649ccbfd (diff) | |
| download | bcm5719-llvm-a0342dc9eb9fe66e6287bdc3c0c0fa00deae652a.tar.gz bcm5719-llvm-a0342dc9eb9fe66e6287bdc3c0c0fa00deae652a.zip | |
[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}
See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765
Reviewers: tamazov, SamWot, arsenm, vpykhtin
Differential Revision: https://reviews.llvm.org/D40088
llvm-svn: 318675
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll b/llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll index 1cdfec9fdb5..2fe064e5dc9 100644 --- a/llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll +++ b/llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll @@ -5,9 +5,9 @@ ; CHECK-LABEL: {{^}}add_const_offset: ; CHECK: v_lshlrev_b32_e32 v[[SHL:[0-9]+]], 4, v0 -; CHECK: v_add_i32_e32 v[[ADD:[0-9]+]], vcc, 0xc80, v[[SHL]] +; CHECK: v_add_u32_e32 v[[ADD:[0-9]+]], vcc, 0xc80, v[[SHL]] ; CHECK-NOT: v_lshl -; CHECK: v_add_i32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[ADD]] +; CHECK: v_add_u32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[ADD]] ; CHECK: load_dword v{{[0-9]+}}, v{{\[}}[[ADDRLO]]: define amdgpu_kernel void @add_const_offset(i32 addrspace(1)* nocapture %arg) { bb: @@ -24,7 +24,7 @@ bb: ; CHECK: v_lshlrev_b32_e32 v[[SHL:[0-9]+]], 4, v0 ; CHECK: v_or_b32_e32 v[[OR:[0-9]+]], 0x1000, v[[SHL]] ; CHECK-NOT: v_lshl -; CHECK: v_add_i32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[OR]] +; CHECK: v_add_u32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[OR]] ; CHECK: load_dword v{{[0-9]+}}, v{{\[}}[[ADDRLO]]: define amdgpu_kernel void @or_const_offset(i32 addrspace(1)* nocapture %arg) { bb: |
