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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-14 05:47:17 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-14 05:47:17 +0000 |
| commit | ca7f5701f879cc082996596bae78f804408ba2a6 (patch) | |
| tree | 8dc491a06957443d6c5fa96018fd7345743ed924 /llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll | |
| parent | 3b04d833c48f4556f9df63b1dad8e8bebbc852f5 (diff) | |
| download | bcm5719-llvm-ca7f5701f879cc082996596bae78f804408ba2a6.tar.gz bcm5719-llvm-ca7f5701f879cc082996596bae78f804408ba2a6.zip | |
AMDGPU/R600: Delete/rename intrinsics no longer used by mesa
Use the replacement pass to update the tests, and delete old names.
llvm-svn: 275375
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll b/llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll index 8c2cbf186f5..e8abbb5c834 100644 --- a/llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll +++ b/llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll @@ -17,14 +17,14 @@ define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 %v0 = insertelement <4 x float> undef, float %r0, i32 0 %v1 = insertelement <4 x float> %v0, float %r1, i32 1 %v2 = insertelement <4 x float> %v1, float %r2, i32 2 - %res = call float @llvm.AMDGPU.dp4(<4 x float> %v2, <4 x float> %v2) + %res = call float @llvm.r600.dot4(<4 x float> %v2, <4 x float> %v2) %vecres = insertelement <4 x float> undef, float %res, i32 0 call void @llvm.R600.store.swizzle(<4 x float> %vecres, i32 0, i32 2) ret void } ; Function Attrs: readnone -declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1 +declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #1 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |
