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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-08 17:19:29 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-08 17:19:29 +0000 |
| commit | bbb47da8a1c9303f2bd3eafbf71a522c850bae54 (patch) | |
| tree | 3c51d2943916a7fd5d0ba7930c6d86df5941e460 /llvm/test/CodeGen/AMDGPU/setcc.ll | |
| parent | 6f605133dd72d7ae404e10e2721c2165d0965cb4 (diff) | |
| download | bcm5719-llvm-bbb47da8a1c9303f2bd3eafbf71a522c850bae54.tar.gz bcm5719-llvm-bbb47da8a1c9303f2bd3eafbf71a522c850bae54.zip | |
AMDGPU: Support commuting with immediate in src0
llvm-svn: 280970
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/setcc.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/setcc.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/setcc.ll b/llvm/test/CodeGen/AMDGPU/setcc.ll index c89e712e4cb..5f7d645bb65 100644 --- a/llvm/test/CodeGen/AMDGPU/setcc.ll +++ b/llvm/test/CodeGen/AMDGPU/setcc.ll @@ -391,8 +391,8 @@ endif: } ; FUNC-LABEL: setcc-i1-and-xor -; SI-DAG: v_cmp_le_f32_e64 [[A:s\[[0-9]+:[0-9]+\]]], 0, s{{[0-9]+}} -; SI-DAG: v_cmp_ge_f32_e64 [[B:s\[[0-9]+:[0-9]+\]]], 1.0, s{{[0-9]+}} +; SI-DAG: v_cmp_ge_f32_e64 [[A:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 0{{$}} +; SI-DAG: v_cmp_le_f32_e64 [[B:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 1.0 ; SI: s_and_b64 s[2:3], [[A]], [[B]] define void @setcc-i1-and-xor(i32 addrspace(1)* %out, float %cond) #0 { bb0: |
