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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-15 00:45:43 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-15 00:45:43 +0000 |
| commit | 45b98189bd34d1cc930691f16d78f420536d97d7 (patch) | |
| tree | 1bfdc89f4fff98633ee4455225e2d32dd4c3d3a8 /llvm/test/CodeGen/AMDGPU/scratch-buffer.ll | |
| parent | 45cabacd2f6d7d815a50c19409f9d662cd082298 (diff) | |
| download | bcm5719-llvm-45b98189bd34d1cc930691f16d78f420536d97d7.tar.gz bcm5719-llvm-45b98189bd34d1cc930691f16d78f420536d97d7.zip | |
AMDGPU: Don't use MUBUF vaddr if address may overflow
Effectively revert r263964. Before we would not
allow this if vaddr was not known to be positive.
llvm-svn: 318240
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/scratch-buffer.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/scratch-buffer.ll | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/scratch-buffer.ll b/llvm/test/CodeGen/AMDGPU/scratch-buffer.ll index 4ae9871865f..3f5a5c511c4 100644 --- a/llvm/test/CodeGen/AMDGPU/scratch-buffer.ll +++ b/llvm/test/CodeGen/AMDGPU/scratch-buffer.ll @@ -1,5 +1,5 @@ -; RUN: llc -amdgpu-scalarize-global-loads=false -verify-machineinstrs -march=amdgcn < %s | FileCheck -check-prefix=GCN %s -; RUN: llc -amdgpu-scalarize-global-loads=false -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -amdgpu-scalarize-global-loads=false -verify-machineinstrs -march=amdgcn < %s | FileCheck -enable-var-scope -check-prefix=GCN %s +; RUN: llc -amdgpu-scalarize-global-loads=false -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -enable-var-scope -check-prefix=GCN %s ; When a frame index offset is more than 12-bits, make sure we don't store ; it in mubuf's offset field. @@ -86,8 +86,21 @@ done: ret void } +; GCN-LABEL: {{^}}neg_vaddr_offset_inbounds: +; GCN: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, 16, v{{[0-9]+}} +; GCN: buffer_store_dword v{{[0-9]+}}, [[ADD]], s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen{{$}} +define amdgpu_kernel void @neg_vaddr_offset_inbounds(i32 %offset) { +entry: + %array = alloca [8192 x i32] + %ptr_offset = add i32 %offset, 4 + %ptr = getelementptr inbounds [8192 x i32], [8192 x i32]* %array, i32 0, i32 %ptr_offset + store i32 0, i32* %ptr + ret void +} + ; GCN-LABEL: {{^}}neg_vaddr_offset: -; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen offset:16{{$}} +; GCN: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, 16, v{{[0-9]+}} +; GCN: buffer_store_dword v{{[0-9]+}}, [[ADD]], s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen{{$}} define amdgpu_kernel void @neg_vaddr_offset(i32 %offset) { entry: %array = alloca [8192 x i32] |
