diff options
| author | Puyan Lotfi <puyan@puyan.org> | 2018-03-12 14:51:19 +0000 |
|---|---|---|
| committer | Puyan Lotfi <puyan@puyan.org> | 2018-03-12 14:51:19 +0000 |
| commit | 5bd46b0008499662d668ca0a3f7c562380ceb126 (patch) | |
| tree | 196586cbe8be31c25191c6a379f137c031ec15eb /llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll | |
| parent | 93f99bf31f04be03fe74395fc72584762a4055d0 (diff) | |
| download | bcm5719-llvm-5bd46b0008499662d668ca0a3f7c562380ceb126.tar.gz bcm5719-llvm-5bd46b0008499662d668ca0a3f7c562380ceb126.zip | |
Updating MIR Language Reference to include new syntax for symbols and physregs.
External symbols now get the sigil '&' while physical registers get the sigil
'$' for their prefix.
llvm-svn: 327276
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll')
0 files changed, 0 insertions, 0 deletions
