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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-23 05:42:49 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-23 05:42:49 +0000 |
| commit | 8aa56781255431723ae546198da2026389e2d506 (patch) | |
| tree | 6f4aa1007a981920b2b7a110649ee4c3674afc6f /llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll | |
| parent | 325cca33eccacea641bb913ba77c8e2f07d4ad66 (diff) | |
| download | bcm5719-llvm-8aa56781255431723ae546198da2026389e2d506.tar.gz bcm5719-llvm-8aa56781255431723ae546198da2026389e2d506.zip | |
AMDGPU: Replace some deprecated intrinsic uses in tests
llvm-svn: 258614
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll b/llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll index 11e8f5176f4..6232cfd2223 100644 --- a/llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll +++ b/llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll @@ -44,10 +44,10 @@ ENDIF: ; preds = %ELSE17, %ELSE, %IF %temp1.0 = phi float [ %., %IF ], [ %48, %ELSE17 ], [ 0.000000e+00, %ELSE ] %temp2.0 = phi float [ 0.000000e+00, %IF ], [ %49, %ELSE17 ], [ 1.000000e+00, %ELSE ] %temp.0 = phi float [ %.18, %IF ], [ %47, %ELSE17 ], [ 0.000000e+00, %ELSE ] - %27 = call float @llvm.AMDIL.clamp.(float %temp.0, float 0.000000e+00, float 1.000000e+00) - %28 = call float @llvm.AMDIL.clamp.(float %temp1.0, float 0.000000e+00, float 1.000000e+00) - %29 = call float @llvm.AMDIL.clamp.(float %temp2.0, float 0.000000e+00, float 1.000000e+00) - %30 = call float @llvm.AMDIL.clamp.(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00) + %27 = call float @llvm.AMDGPU.clamp.f32(float %temp.0, float 0.000000e+00, float 1.000000e+00) + %28 = call float @llvm.AMDGPU.clamp.f32(float %temp1.0, float 0.000000e+00, float 1.000000e+00) + %29 = call float @llvm.AMDGPU.clamp.f32(float %temp2.0, float 0.000000e+00, float 1.000000e+00) + %30 = call float @llvm.AMDGPU.clamp.f32(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00) %31 = insertelement <4 x float> undef, float %27, i32 0 %32 = insertelement <4 x float> %31, float %28, i32 1 %33 = insertelement <4 x float> %32, float %29, i32 2 @@ -74,7 +74,7 @@ ELSE17: ; preds = %ELSE br label %ENDIF } -declare float @llvm.AMDIL.clamp.(float, float, float) #0 +declare float @llvm.AMDGPU.clamp.f32(float, float, float) #0 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |
