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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-09-19 20:54:38 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-09-19 20:54:38 +0000 |
| commit | d4ae470d2e7a967331a5bb3ae5be29a4f0b6c764 (patch) | |
| tree | 9065b407288d50bfeb20d5827ea6fb2dcbf008ca /llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | |
| parent | 59a01a958a55c75af4076e35ba67e2a4a38d8dce (diff) | |
| download | bcm5719-llvm-d4ae470d2e7a967331a5bb3ae5be29a4f0b6c764.tar.gz bcm5719-llvm-d4ae470d2e7a967331a5bb3ae5be29a4f0b6c764.zip | |
[AMDGPU] Prevent post-RA scheduler from breaking memory clauses
The pre-RA scheduler does load/store clustering, but post-RA
scheduler undoes it. Add mutation to prevent it.
Differential Revision: https://reviews.llvm.org/D38014
llvm-svn: 313670
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/salu-to-valu.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll index d5b2fa0b675..a826661442e 100644 --- a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll +++ b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll @@ -170,10 +170,10 @@ entry: ; CI. ; GCN-LABEL: {{^}}smrd_valu_ci_offset_x8: -; GCN-NOHSA: s_mov_b32 [[OFFSET1:s[0-9]+]], 0x9a50{{$}} -; GCN-NOHSA-NOT: v_add ; GCN-NOHSA: s_mov_b32 [[OFFSET0:s[0-9]+]], 0x9a40{{$}} ; GCN-NOHSA-NOT: v_add +; GCN-NOHSA: s_mov_b32 [[OFFSET1:s[0-9]+]], 0x9a50{{$}} +; GCN-NOHSA-NOT: v_add ; GCN-NOHSA: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+:[0-9]+}}], [[OFFSET1]] addr64{{$}} ; GCN-NOHSA: buffer_load_dwordx4 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+:[0-9]+}}], [[OFFSET0]] addr64{{$}} |
