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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-15 21:27:08 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-15 21:27:08 +0000 |
| commit | 82e5e1e564d77dcd8babbfa9c2850912f94786e4 (patch) | |
| tree | 81e53dcf93d1effa226d94c94967d4646f2cbcaa /llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll | |
| parent | 11d3e21f2b7297ddcb213f6892134b5c8f2a520b (diff) | |
| download | bcm5719-llvm-82e5e1e564d77dcd8babbfa9c2850912f94786e4.tar.gz bcm5719-llvm-82e5e1e564d77dcd8babbfa9c2850912f94786e4.zip | |
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
llvm-svn: 275619
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll b/llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll index e9c82cdc548..50df64bf547 100644 --- a/llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll +++ b/llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll @@ -40,11 +40,11 @@ bb: %tmp34 = fadd <4 x float> %tmp33, %tmp23 %tmp35 = fadd <4 x float> %tmp34, %tmp25 %tmp36 = fadd <4 x float> %tmp35, %tmp27 - call void @llvm.R600.store.swizzle(<4 x float> %tmp36, i32 0, i32 2) + call void @llvm.r600.store.swizzle(<4 x float> %tmp36, i32 0, i32 2) ret void } -declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) +declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) ; Function Attrs: nounwind readnone declare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0 |
