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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-24 22:02:15 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-24 22:02:15 +0000 |
| commit | 7aad8fd8f45e07d72e50792aec18c2b476bdd96e (patch) | |
| tree | c4944a9d92eed6e454c369d9723cad854da9498b /llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll | |
| parent | e4c1dd2c08586649ebb3ae1e51ad98f0efabaf68 (diff) | |
| download | bcm5719-llvm-7aad8fd8f45e07d72e50792aec18c2b476bdd96e.tar.gz bcm5719-llvm-7aad8fd8f45e07d72e50792aec18c2b476bdd96e.zip | |
Enable FeatureFlatForGlobal on Volcanic Islands
This switches to the workaround that HSA defaults to
for the mesa path.
This should be applied to the 4.0 branch.
Patch by Vedran Miletić <vedran@miletic.net>
llvm-svn: 292982
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll b/llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll index c902cb9e1df..dd67dc488db 100644 --- a/llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll +++ b/llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll @@ -1,6 +1,6 @@ ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s ; GCN-LABEL: {{^}}reduce_i64_load_align_4_width_to_i32: ; GCN: buffer_load_dword [[VAL:v[0-9]+]] |
