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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-04-06 19:40:20 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-04-06 19:40:20 +0000 |
| commit | df3a20cd8068c732a0b26bdf8c1857c7d97104b4 (patch) | |
| tree | 11974d0749ffa9d399f72a66fd5787d6ec248103 /llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll | |
| parent | 1b6188d2f865366ef94d65b65596f47c9196c20c (diff) | |
| download | bcm5719-llvm-df3a20cd8068c732a0b26bdf8c1857c7d97104b4.tar.gz bcm5719-llvm-df3a20cd8068c732a0b26bdf8c1857c7d97104b4.zip | |
AMDGPU: Add a shader calling convention
This makes it possible to distinguish between mesa shaders
and other kernels even in the presence of compute shaders.
Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Differential Revision: http://reviews.llvm.org/D18559
llvm-svn: 265589
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll b/llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll index f388f8ffe29..5eb89589484 100644 --- a/llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll +++ b/llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll @@ -1,6 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=cayman -define void @main(<4 x float> inreg, <4 x float> inreg) #0 { +define amdgpu_ps void @main(<4 x float> inreg, <4 x float> inreg) { main_body: %2 = extractelement <4 x float> %0, i32 0 %3 = extractelement <4 x float> %0, i32 1 @@ -54,5 +54,4 @@ declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) -attributes #0 = { "ShaderType"="0" } attributes #1 = { readnone } |
