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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-21 09:45:59 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-21 09:45:59 +0000 |
| commit | 5aa7cdfd7094b9f26be87153f5c7eb236b98507f (patch) | |
| tree | 195d5edc93108c098d1e527781c3e439b660d5a9 /llvm/test/CodeGen/AMDGPU/promote-alloca-array-allocation.ll | |
| parent | bf5a3f839341a5162482f8e9f389c320087b89eb (diff) | |
| download | bcm5719-llvm-5aa7cdfd7094b9f26be87153f5c7eb236b98507f.tar.gz bcm5719-llvm-5aa7cdfd7094b9f26be87153f5c7eb236b98507f.zip | |
[X86][SSE] Support v4i32 rotations (PR37426)
As suggested by Fabian on PR37426, we can use PMULUDQ to perform v4i32 vector rotations as the upper 32bits of the multiply will contain the 'wrapped' bits of the rotation.
v8i16/v16i8 rotations would be straightforward to add to lowerRotate in the future - ideally we'd mostly share code with the vector shifts lowering.
Differential Revision: https://reviews.llvm.org/D46954
llvm-svn: 332832
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/promote-alloca-array-allocation.ll')
0 files changed, 0 insertions, 0 deletions
