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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-15 21:27:08 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-15 21:27:08 +0000 |
| commit | 82e5e1e564d77dcd8babbfa9c2850912f94786e4 (patch) | |
| tree | 81e53dcf93d1effa226d94c94967d4646f2cbcaa /llvm/test/CodeGen/AMDGPU/predicate-dp4.ll | |
| parent | 11d3e21f2b7297ddcb213f6892134b5c8f2a520b (diff) | |
| download | bcm5719-llvm-82e5e1e564d77dcd8babbfa9c2850912f94786e4.tar.gz bcm5719-llvm-82e5e1e564d77dcd8babbfa9c2850912f94786e4.zip | |
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
llvm-svn: 275619
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/predicate-dp4.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/predicate-dp4.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/predicate-dp4.ll b/llvm/test/CodeGen/AMDGPU/predicate-dp4.ll index 9b595231946..7ac2bb7b0c7 100644 --- a/llvm/test/CodeGen/AMDGPU/predicate-dp4.ll +++ b/llvm/test/CodeGen/AMDGPU/predicate-dp4.ll @@ -17,10 +17,10 @@ IF: ; preds = %main_body ENDIF: ; preds = %IF, %main_body %5 = phi float [%4, %IF], [0.000000e+00, %main_body] %6 = insertelement <4 x float> undef, float %5, i32 0 - call void @llvm.R600.store.swizzle(<4 x float> %6, i32 0, i32 0) + call void @llvm.r600.store.swizzle(<4 x float> %6, i32 0, i32 0) ret void } declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #1 -declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) +declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) attributes #1 = { readnone } |
