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| author | David Stuttard <david.stuttard@amd.com> | 2019-03-12 09:52:58 +0000 |
|---|---|---|
| committer | David Stuttard <david.stuttard@amd.com> | 2019-03-12 09:52:58 +0000 |
| commit | 20ea21c6ede8426be9832d684409a2388e2ca31a (patch) | |
| tree | f092654776b1fb81f341dc7fad60ebf668d4d0ed /llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir | |
| parent | 31ff647c1d261364e716e6b607065b6ecce4ca1f (diff) | |
| download | bcm5719-llvm-20ea21c6ede8426be9832d684409a2388e2ca31a.tar.gz bcm5719-llvm-20ea21c6ede8426be9832d684409a2388e2ca31a.zip | |
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir b/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir index 61e6f443487..9851321c0a1 100644 --- a/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir +++ b/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir @@ -19,7 +19,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3 @@ -41,7 +41,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_redef_vcc1 @@ -67,7 +67,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_redef_vcc2 @@ -93,7 +93,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_redef_cmp @@ -119,7 +119,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_undef_vcc @@ -137,7 +137,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_imp_vcc @@ -159,7 +159,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_imp_vcc @@ -181,7 +181,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_redef_sel @@ -207,7 +207,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_used_sel @@ -231,7 +231,7 @@ body: | bb.2: $vgpr0 = COPY %1 - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_used_vcc @@ -257,7 +257,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_sel_wrong_subreg1 @@ -283,7 +283,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_sel_wrong_subreg2 @@ -309,7 +309,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_sel_right_subreg1 @@ -333,7 +333,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_sel_right_subreg2 @@ -357,7 +357,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop3_sel_subreg_overlap @@ -383,7 +383,7 @@ body: | S_BRANCH %bb.0 bb.2: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_dominated_blocks @@ -407,7 +407,7 @@ body: | S_BRANCH %bb.1 bb.3: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_different_blocks_cmp_and @@ -431,7 +431,7 @@ body: | S_BRANCH %bb.1 bb.3: - S_ENDPGM + S_ENDPGM 0 ... # GCN: name: negated_cond_vop2_not_dominated_blocks @@ -461,5 +461,5 @@ body: | S_BRANCH %bb.2 bb.4: - S_ENDPGM + S_ENDPGM 0 ... |
