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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-02-20 00:37:25 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-02-20 00:37:25 +0000 |
| commit | 467b5b9024ec1e9348ad24ea736eb9a94c653bb0 (patch) | |
| tree | cebb53aa1ed4c8393b64f4e31218db3f58f91b52 /llvm/test/CodeGen/AMDGPU/missing-store.ll | |
| parent | e611698e845c1d019960230930966632b911abe7 (diff) | |
| download | bcm5719-llvm-467b5b9024ec1e9348ad24ea736eb9a94c653bb0.tar.gz bcm5719-llvm-467b5b9024ec1e9348ad24ea736eb9a94c653bb0.zip | |
AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer
Summary:
Instead of trying to replace SMRD instructions with a VGPR base pointer
with an equivalent MUBUF instruction, we now copy the base pointer to
SGPRs using v_readfirstlane.
This is safe to do, because any load selected as an SMRD instruction
has been proven to have a uniform base pointer, so each thread in the
wave will have the same pointer value in VGPRs.
This will fix some errors on VI from trying to replace SMRD instructions
with addr64-enabled MUBUF instructions that don't exist.
Reviewers: arsenm, cfang, nhaehnle
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D17305
llvm-svn: 261385
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/missing-store.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/missing-store.ll | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/missing-store.ll b/llvm/test/CodeGen/AMDGPU/missing-store.ll index 4af9cdf1b96..c919b3b5819 100644 --- a/llvm/test/CodeGen/AMDGPU/missing-store.ll +++ b/llvm/test/CodeGen/AMDGPU/missing-store.ll @@ -8,7 +8,9 @@ ; FUNC-LABEL: {{^}}missing_store_reduced: ; SI: ds_read_b64 ; SI: buffer_store_dword -; SI: buffer_load_dword +; SI: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}} +; SI: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}} +; SI: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}} ; SI: buffer_store_dword ; SI: s_endpgm define void @missing_store_reduced(i32 addrspace(1)* %out, i32 addrspace(1)* %gptr) #0 { |
