diff options
author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-24 06:58:01 +0000 |
---|---|---|
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-24 06:58:01 +0000 |
commit | 0534f4aa79edeff44f0f34125f3cf7d3820753b8 (patch) | |
tree | 3d35c6d72f03c956d4125ac2db7576140c7635c8 /llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll | |
parent | 00f607eef06dec993c34bb5f6d60554a6c22a8fa (diff) | |
download | bcm5719-llvm-0534f4aa79edeff44f0f34125f3cf7d3820753b8.tar.gz bcm5719-llvm-0534f4aa79edeff44f0f34125f3cf7d3820753b8.zip |
AMDGPU: Un-xfail and add tests
Un XFAIL a few tests plus a few more I had lying around
in my tree, which seem to all work now but I don't see tests
that quite test the same things.
llvm-svn: 273655
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll b/llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll new file mode 100644 index 00000000000..9183ae0972d --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll @@ -0,0 +1,36 @@ +; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +; If the workgroup id range is restricted, we should be able to use +; mad24 for the usual indexing pattern. + +declare i32 @llvm.amdgcn.workgroup.id.x() #0 +declare i32 @llvm.amdgcn.workitem.id.x() #0 +declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #0 + +; GCN-LABEL: {{^}}get_global_id_0: +; GCN: s_and_b32 [[WGSIZEX:s[0-9]+]], {{s[0-9]+}}, 0xffff +; GCN: v_mov_b32_e32 [[VWGSIZEX:v[0-9]+]], [[WGSIZEX]] +; GCN: v_mad_u32_u24 v{{[0-9]+}}, [[VWGSIZEX]], s8, v0 +define void @get_global_id_0(i32 addrspace(1)* %out) #1 { + %dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() + %cast.dispatch.ptr = bitcast i8 addrspace(2)* %dispatch.ptr to i32 addrspace(2)* + %gep = getelementptr inbounds i32, i32 addrspace(2)* %cast.dispatch.ptr, i64 1 + %workgroup.size.xy = load i32, i32 addrspace(2)* %gep, align 4, !invariant.load !0 + %workgroup.size.x = and i32 %workgroup.size.xy, 65535 + + %workitem.id.x = call i32 @llvm.amdgcn.workitem.id.x(), !range !1 + %workgroup.id.x = call i32 @llvm.amdgcn.workgroup.id.x(), !range !2 + + %mul = mul i32 %workgroup.id.x, %workgroup.size.x + %add = add i32 %mul, %workitem.id.x + + store i32 %add, i32 addrspace(1)* %out, align 4 + ret void +} + +attributes #0 = { nounwind readnone } +attributes #1 = { nounwind } + +!0 = !{} +!1 = !{i32 0, i32 1024} +!2 = !{i32 0, i32 16777216} |