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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-04-12 14:05:04 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-04-12 14:05:04 +0000
commita9dbdcae04005da93d40b338c5281452cdf43b2a (patch)
treed41399d88a16e0864cd964fe096948772a228500 /llvm/test/CodeGen/AMDGPU/local-atomics.ll
parent21ecfe43babad065576061714fa92299ed28f35c (diff)
downloadbcm5719-llvm-a9dbdcae04005da93d40b338c5281452cdf43b2a.tar.gz
bcm5719-llvm-a9dbdcae04005da93d40b338c5281452cdf43b2a.zip
AMDGPU: Add atomic_inc + atomic_dec intrinsics
These are different than atomicrmw add 1 because they have an additional input value to clamp the result. llvm-svn: 266074
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/local-atomics.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/local-atomics.ll1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomics.ll b/llvm/test/CodeGen/AMDGPU/local-atomics.ll
index 529554cf013..ce82ff5475b 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomics.ll
@@ -324,7 +324,6 @@ define void @lds_atomic_xchg_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
ret void
}
-; XXX - Is it really necessary to load 4 into VGPR?
; FUNC-LABEL: {{^}}lds_atomic_add_noret_i32:
; GCN: s_load_dword [[SPTR:s[0-9]+]],
; GCN: v_mov_b32_e32 [[DATA:v[0-9]+]], 4
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