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| author | Farhana Aleen <farhana.aleen@gmail.com> | 2018-03-09 17:41:39 +0000 |
|---|---|---|
| committer | Farhana Aleen <farhana.aleen@gmail.com> | 2018-03-09 17:41:39 +0000 |
| commit | a7cb31123c2526f04e6a587d6ada4084cefe6fb4 (patch) | |
| tree | 0f2e93bca2bbcf7eb638c5a1dad49127172cd5f8 /llvm/test/CodeGen/AMDGPU/load-local-i16.ll | |
| parent | 91fc4e09499c24e9184853e9a53a953bdea8a356 (diff) | |
| download | bcm5719-llvm-a7cb31123c2526f04e6a587d6ada4084cefe6fb4.tar.gz bcm5719-llvm-a7cb31123c2526f04e6a587d6ada4084cefe6fb4.zip | |
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
Summary: Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64.
This patch supports ds_read_b128 instruction pattern and generation of this instruction.
In the vectorizer, this patch also widen the vector length so that vectorizer generates
128 bit loads for local address-space which gets translated to ds_read_b128.
Since the performance benefit is not clear; compiler generates ds_read_b128 under -amdgpu-ds128.
Author: FarhanaAleen
Reviewed By: rampitec, arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D44210
llvm-svn: 327153
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/load-local-i16.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/load-local-i16.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/load-local-i16.ll b/llvm/test/CodeGen/AMDGPU/load-local-i16.ll index d3557c14540..7438fd2681d 100644 --- a/llvm/test/CodeGen/AMDGPU/load-local-i16.ll +++ b/llvm/test/CodeGen/AMDGPU/load-local-i16.ll @@ -3,6 +3,10 @@ ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,GFX89,FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s +; Testing for ds_read_b128 +; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s + ; FUNC-LABEL: {{^}}local_load_i16: ; GFX9-NOT: m0 ; SICIVI: s_mov_b32 m0 @@ -935,4 +939,18 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(<32 x i64> addrspace( ; ret void ; } +; Tests if ds_read_b128 gets generated for the 16 byte aligned load. +; FUNC-LABEL: {{^}}local_v8i16_to_128: +; SI-NOT: ds_read_b128 +; CIVI: ds_read_b128 +; EG: LDS_READ_RET +; EG: LDS_READ_RET +; EG: LDS_READ_RET +; EG: LDS_READ_RET +define amdgpu_kernel void @local_v8i16_to_128(<8 x i16> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) { + %ld = load <8 x i16>, <8 x i16> addrspace(3)* %in, align 16 + store <8 x i16> %ld, <8 x i16> addrspace(3)* %out + ret void +} + attributes #0 = { nounwind } |
