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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-05-04 20:06:57 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-05-04 20:06:57 +0000 |
| commit | c2c2eb7d01bbf279dbe40a97b521404231c7768d (patch) | |
| tree | 9868bd0b9ea5b60a616a6ef46c6532cf9a0983ec /llvm/test/CodeGen/AMDGPU/load-hi16.ll | |
| parent | e1c7a46d5b55bbe870c0b9aa3a4f3d3ea396550e (diff) | |
| download | bcm5719-llvm-c2c2eb7d01bbf279dbe40a97b521404231c7768d.tar.gz bcm5719-llvm-c2c2eb7d01bbf279dbe40a97b521404231c7768d.zip | |
AMDGPU: Add D16 instructions preserve unused bits feature
- Predicate D16 patterns on this new feature
- Added this new feature to gfx900/2/4
Differential Revision: https://reviews.llvm.org/D46366
llvm-svn: 331551
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/load-hi16.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/load-hi16.ll | 407 |
1 files changed, 207 insertions, 200 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/load-hi16.ll b/llvm/test/CodeGen/AMDGPU/load-hi16.ll index 94b4133dc2f..f5a1940bbc2 100644 --- a/llvm/test/CodeGen/AMDGPU/load-hi16.ll +++ b/llvm/test/CodeGen/AMDGPU/load-hi16.ll @@ -1,13 +1,14 @@ -; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s -; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX900 %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX906,NO-D16-HI %s +; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX803,NO-D16-HI %s ; GCN-LABEL: {{^}}load_local_hi_v2i16_undeflo: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16_d16_hi v0, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16_d16_hi v0, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v +; NO-D16-HI: ds_read_u16 v define <2 x i16> @load_local_hi_v2i16_undeflo(i16 addrspace(3)* %in) #0 { entry: %load = load i16, i16 addrspace(3)* %in @@ -17,12 +18,12 @@ entry: ; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v1 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v1 +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v +; NO-D16-HI: ds_read_u16 v define <2 x i16> @load_local_hi_v2i16_reglo(i16 addrspace(3)* %in, i16 %reg) #0 { entry: %load = load i16, i16 addrspace(3)* %in @@ -34,13 +35,13 @@ entry: ; Show that we get reasonable regalloc without physreg constraints. ; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v +; NO-D16-HI: ds_read_u16 v define void @load_local_hi_v2i16_reglo_vreg(i16 addrspace(3)* %in, i16 %reg) #0 { entry: %load = load i16, i16 addrspace(3)* %in @@ -52,13 +53,13 @@ entry: ; GCN-LABEL: {{^}}load_local_hi_v2i16_zerolo: ; GCN: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v1, 0 -; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v1 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: v_mov_b32_e32 v1, 0 +; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v1 +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v +; NO-D16-HI: ds_read_u16 v define <2 x i16> @load_local_hi_v2i16_zerolo(i16 addrspace(3)* %in) #0 { entry: %load = load i16, i16 addrspace(3)* %in @@ -69,13 +70,13 @@ entry: ; FIXME: Remove m0 initialization ; GCN-LABEL: {{^}}load_local_hi_v2i16_zerolo_shift: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16 v0, v0 -; GFX9-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16 v0, v0 +; GFX900-NEXT: s_waitcnt lgkmcnt(0) +; GFX900-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v -; VI: v_lshlrev_b32_e32 v0, 16, v0 +; NO-D16-HI: ds_read_u16 v +; NO-D16-HI: v_lshlrev_b32_e32 v0, 16, v0 define i32 @load_local_hi_v2i16_zerolo_shift(i16 addrspace(3)* %in) #0 { entry: %load = load i16, i16 addrspace(3)* %in @@ -86,13 +87,13 @@ entry: ; GCN-LABEL: {{^}}load_local_hi_v2f16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u16 v +; NO-D16-HI: ds_read_u16 v define void @load_local_hi_v2f16_reglo_vreg(half addrspace(3)* %in, half %reg) #0 { entry: %load = load half, half addrspace(3)* %in @@ -104,13 +105,13 @@ entry: ; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg_zexti8: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u8_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u8_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_u8 v +; NO-D16-HI: ds_read_u8 v define void @load_local_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(3)* %in, i16 %reg) #0 { entry: %load = load i8, i8 addrspace(3)* %in @@ -123,13 +124,13 @@ entry: ; GCN-LABEL: {{^}}load_local_hi_v2i16_reglo_vreg_sexti8: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_i8_d16_hi v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v1, off{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_i8_d16_hi v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: ds_read_i8 v +; NO-D16-HI: ds_read_i8 v define void @load_local_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(3)* %in, i16 %reg) #0 { entry: %load = load i8, i8 addrspace(3)* %in @@ -142,11 +143,11 @@ entry: ; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 define void @load_global_hi_v2i16_reglo_vreg(i16 addrspace(1)* %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 -2047 @@ -159,11 +160,11 @@ entry: ; GCN-LABEL: {{^}}load_global_hi_v2f16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 define void @load_global_hi_v2f16_reglo_vreg(half addrspace(1)* %in, half %reg) #0 { entry: %gep = getelementptr inbounds half, half addrspace(1)* %in, i64 -2047 @@ -176,11 +177,11 @@ entry: ; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg_zexti8: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:-4095 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:-4095 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 define void @load_global_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(1)* %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095 @@ -194,11 +195,11 @@ entry: ; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg_sexti8: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_sbyte_d16_hi v2, v[0:1], off offset:-4095 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_sbyte_d16_hi v2, v[0:1], off offset:-4095 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 define void @load_global_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(1)* %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095 @@ -212,15 +213,16 @@ entry: ; GCN-LABEL: load_flat_hi_v2i16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1] -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: flat_load_short_d16_hi v2, v[0:1] +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_ushort v{{[0-9]+}} -; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, -; VI: v_or_b32_sdwa +; NO-D16-HI: flat_load_ushort v{{[0-9]+}} +; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, +; GFX803: v_or_b32_sdwa +; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, define void @load_flat_hi_v2i16_reglo_vreg(i16* %in, i16 %reg) #0 { entry: %load = load i16, i16* %in @@ -232,15 +234,16 @@ entry: ; GCN-LABEL: {{^}}load_flat_hi_v2f16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1] -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: flat_load_short_d16_hi v2, v[0:1] +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_ushort v{{[0-9]+}} -; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, -; VI: v_or_b32_sdwa +; NO-D16-HI: flat_load_ushort v{{[0-9]+}} +; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, +; GFX803: v_or_b32_sdwa +; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, define void @load_flat_hi_v2f16_reglo_vreg(half* %in, half %reg) #0 { entry: %load = load half, half* %in @@ -252,15 +255,16 @@ entry: ; GCN-LABEL: {{^}}load_flat_hi_v2i16_reglo_vreg_zexti8: ; GCN: s_waitcnt -; GFX9-NEXT: flat_load_ubyte_d16_hi v2, v[0:1] -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: flat_load_ubyte_d16_hi v2, v[0:1] +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_ubyte v{{[0-9]+}} -; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, -; VI: v_or_b32_sdwa +; NO-D16-HI: flat_load_ubyte v{{[0-9]+}} +; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, +; GFX803: v_or_b32_sdwa +; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, define void @load_flat_hi_v2i16_reglo_vreg_zexti8(i8* %in, i16 %reg) #0 { entry: %load = load i8, i8* %in @@ -273,15 +277,16 @@ entry: ; GCN-LABEL: {{^}}load_flat_hi_v2i16_reglo_vreg_sexti8: ; GCN: s_waitcnt -; GFX9-NEXT: flat_load_sbyte_d16_hi v2, v[0:1] -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v[0:1], v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: flat_load_sbyte_d16_hi v2, v[0:1] +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v[0:1], v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_sbyte v{{[0-9]+}} -; VI: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, -; VI: v_or_b32_sdwa +; NO-D16-HI: flat_load_sbyte v{{[0-9]+}} +; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, +; GFX803: v_or_b32_sdwa +; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, define void @load_flat_hi_v2i16_reglo_vreg_sexti8(i8* %in, i16 %reg) #0 { entry: %load = load i8, i8* %in @@ -294,13 +299,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg: ; GCN: s_waitcnt -; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} +; NO-D16-HI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} define void @load_private_hi_v2i16_reglo_vreg(i16 addrspace(5)* byval %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(5)* %in, i64 2045 @@ -313,13 +318,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg: ; GCN: s_waitcnt -; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} +; NO-D16-HI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s5 offset:4094{{$}} define void @load_private_hi_v2f16_reglo_vreg(half addrspace(5)* byval %in, half %reg) #0 { entry: %gep = getelementptr inbounds half, half addrspace(5)* %in, i64 2045 @@ -332,13 +337,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff: ; GCN: s_waitcnt -; GFX9: buffer_load_short_d16_hi v0, off, s[0:3], s4 offset:4094{{$}} -; GFX9: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_short_d16_hi v0, off, s[0:3], s4 offset:4094{{$}} +; GFX900: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} +; NO-D16-HI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} define void @load_private_hi_v2i16_reglo_vreg_nooff(i16 addrspace(5)* byval %in, i16 %reg) #0 { entry: %load = load volatile i16, i16 addrspace(5)* inttoptr (i32 4094 to i16 addrspace(5)*) @@ -350,13 +355,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_nooff: ; GCN: s_waitcnt -; GFX9-NEXT: buffer_load_short_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: buffer_load_short_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} +; NO-D16-HI: buffer_load_ushort v{{[0-9]+}}, off, s[0:3], s4 offset:4094{{$}} define void @load_private_hi_v2f16_reglo_vreg_nooff(half addrspace(5)* %in, half %reg) #0 { entry: %load = load volatile half, half addrspace(5)* inttoptr (i32 4094 to half addrspace(5)*) @@ -368,13 +373,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_zexti8: ; GCN: s_waitcnt -; GFX9: buffer_load_ubyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_ubyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ubyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} +; NO-D16-HI: buffer_load_ubyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} define void @load_private_hi_v2i16_reglo_vreg_zexti8(i8 addrspace(5)* byval %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091 @@ -388,13 +393,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_sexti8: ; GCN: s_waitcnt -; GFX9: buffer_load_sbyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_sbyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_sbyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} +; NO-D16-HI: buffer_load_sbyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}} define void @load_private_hi_v2i16_reglo_vreg_sexti8(i8 addrspace(5)* byval %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091 @@ -408,13 +413,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff_zexti8: ; GCN: s_waitcnt -; GFX9-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} +; NO-D16-HI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} define void @load_private_hi_v2i16_reglo_vreg_nooff_zexti8(i8 addrspace(5)* %in, i16 %reg) #0 { entry: %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) @@ -427,13 +432,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_nooff_sexti8: ; GCN: s_waitcnt -; GFX9-NEXT: buffer_load_sbyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: buffer_load_sbyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_sbyte v0, off, s[0:3], s4 offset:4094{{$}} +; NO-D16-HI: buffer_load_sbyte v0, off, s[0:3], s4 offset:4094{{$}} define void @load_private_hi_v2i16_reglo_vreg_nooff_sexti8(i8 addrspace(5)* %in, i16 %reg) #0 { entry: %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) @@ -446,13 +451,13 @@ entry: ; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_nooff_zexti8: ; GCN: s_waitcnt -; GFX9-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: buffer_load_ubyte_d16_hi v1, off, s[0:3], s4 offset:4094{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v1 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} +; NO-D16-HI: buffer_load_ubyte v0, off, s[0:3], s4 offset:4094{{$}} define void @load_private_hi_v2f16_reglo_vreg_nooff_zexti8(i8 addrspace(5)* %in, half %reg) #0 { entry: %load = load volatile i8, i8 addrspace(5)* inttoptr (i32 4094 to i8 addrspace(5)*) @@ -466,13 +471,14 @@ entry: ; GCN-LABEL: {{^}}load_constant_hi_v2i16_reglo_vreg: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_ushort +; GFX803: flat_load_ushort +; GFX906: global_load_ushort define void @load_constant_hi_v2i16_reglo_vreg(i16 addrspace(4)* %in, i16 %reg) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(4)* %in, i64 -2047 @@ -485,13 +491,14 @@ entry: ; GCN-LABEL: load_constant_hi_v2f16_reglo_vreg ; GCN: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_store_dword -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_store_dword +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 -; VI: flat_load_ushort +; GFX803: flat_load_ushort +; GFX906: global_load_ushort define void @load_constant_hi_v2f16_reglo_vreg(half addrspace(4)* %in, half %reg) #0 { entry: %gep = getelementptr inbounds half, half addrspace(4)* %in, i64 -2047 @@ -506,8 +513,8 @@ entry: ; to offset variant. ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_to_offset: -; GFX9: buffer_store_dword -; GFX9-NEXT: buffer_load_short_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4094 +; GFX900: buffer_store_dword +; GFX900-NEXT: buffer_load_short_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4094 define void @load_private_hi_v2i16_reglo_vreg_to_offset(i16 %reg) #0 { entry: %obj0 = alloca [10 x i32], align 4, addrspace(5) @@ -523,8 +530,8 @@ entry: } ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_sexti8_to_offset: -; GFX9: buffer_store_dword -; GFX9-NEXT: buffer_load_sbyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095 +; GFX900: buffer_store_dword +; GFX900-NEXT: buffer_load_sbyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095 define void @load_private_hi_v2i16_reglo_vreg_sexti8_to_offset(i16 %reg) #0 { entry: %obj0 = alloca [10 x i32], align 4, addrspace(5) @@ -541,8 +548,8 @@ entry: } ; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_zexti8_to_offset: -; GFX9: buffer_store_dword -; GFX9-NEXT: buffer_load_ubyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095 +; GFX900: buffer_store_dword +; GFX900-NEXT: buffer_load_ubyte_d16_hi v{{[0-9]+}}, off, s[0:3], s5 offset:4095 define void @load_private_hi_v2i16_reglo_vreg_zexti8_to_offset(i16 %reg) #0 { entry: %obj0 = alloca [10 x i32], align 4, addrspace(5) @@ -562,12 +569,12 @@ entry: ; FIXME: Is there a cost to using the extload over not? ; GCN-LABEL: {{^}}load_local_v2i16_split: ; GCN: s_waitcnt -; GFX9-NEXT: ds_read_u16 v1, v0 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: ds_read_u16_d16_hi v1, v0 offset:2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v1 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: ds_read_u16 v1, v0 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 offset:2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v1 +; GFX900-NEXT: s_setpc_b64 define <2 x i16> @load_local_v2i16_split(i16 addrspace(3)* %in) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 1 @@ -581,12 +588,12 @@ entry: ; FIXME: Remove waitcnt between reads ; GCN-LABEL: {{^}}load_global_v2i16_split: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_ushort v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v2 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_ushort v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_load_short_d16_hi v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v2 +; GFX900-NEXT: s_setpc_b64 define <2 x i16> @load_global_v2i16_split(i16 addrspace(1)* %in) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 1 @@ -600,12 +607,12 @@ entry: ; FIXME: Remove waitcnt between reads ; GCN-LABEL: {{^}}load_flat_v2i16_split: ; GCN: s_waitcnt -; GFX9-NEXT: flat_load_ushort v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: flat_load_short_d16_hi v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v2 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: flat_load_ushort v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: flat_load_short_d16_hi v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v2 +; GFX900-NEXT: s_setpc_b64 define <2 x i16> @load_flat_v2i16_split(i16* %in) #0 { entry: %gep = getelementptr inbounds i16, i16* %in, i64 1 @@ -619,12 +626,12 @@ entry: ; FIXME: Remove waitcnt between reads ; GCN-LABEL: {{^}}load_constant_v2i16_split: ; GCN: s_waitcnt -; GFX9-NEXT: global_load_ushort v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: global_load_short_d16_hi v2 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: v_mov_b32_e32 v0, v2 -; GFX9-NEXT: s_setpc_b64 +; GFX900-NEXT: global_load_ushort v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: global_load_short_d16_hi v2 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: v_mov_b32_e32 v0, v2 +; GFX900-NEXT: s_setpc_b64 define <2 x i16> @load_constant_v2i16_split(i16 addrspace(4)* %in) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(4)* %in, i64 1 @@ -639,11 +646,11 @@ entry: ; FIXME: Is there a cost to using the extload over not? ; GCN-LABEL: {{^}}load_private_v2i16_split: ; GCN: s_waitcnt -; GFX9: buffer_load_ushort v0, off, s[0:3], s5 offset:4{{$}} -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:6 -; GFX9-NEXT: s_waitcnt -; GFX9-NEXT: s_setpc_b64 +; GFX900: buffer_load_ushort v0, off, s[0:3], s5 offset:4{{$}} +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:6 +; GFX900-NEXT: s_waitcnt +; GFX900-NEXT: s_setpc_b64 define <2 x i16> @load_private_v2i16_split(i16 addrspace(5)* byval %in) #0 { entry: %gep = getelementptr inbounds i16, i16 addrspace(5)* %in, i32 1 |

