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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-03-21 21:39:51 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-03-21 21:39:51 +0000 |
commit | 3dbeefa978fb7e7b231b249f9cd90c67b9e83277 (patch) | |
tree | d74bf7fe30e44588d573919f3625edacb2586112 /llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll | |
parent | f6021ecddc73d14c94ad70938250d58f330795be (diff) | |
download | bcm5719-llvm-3dbeefa978fb7e7b231b249f9cd90c67b9e83277.tar.gz bcm5719-llvm-3dbeefa978fb7e7b231b249f9cd90c67b9e83277.zip |
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.
Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).
llvm-svn: 298444
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll index c644288977a..0ce26d0fe87 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll @@ -6,7 +6,7 @@ declare double @llvm.amdgcn.rsq.f64(double) #0 ; FUNC-LABEL: {{^}}rsq_f32: ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}} -define void @rsq_f32(float addrspace(1)* %out, float %src) #1 { +define amdgpu_kernel void @rsq_f32(float addrspace(1)* %out, float %src) #1 { %rsq = call float @llvm.amdgcn.rsq.f32(float %src) #0 store float %rsq, float addrspace(1)* %out, align 4 ret void @@ -15,7 +15,7 @@ define void @rsq_f32(float addrspace(1)* %out, float %src) #1 { ; TODO: Really these should be constant folded ; FUNC-LABEL: {{^}}rsq_f32_constant_4.0 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0 -define void @rsq_f32_constant_4.0(float addrspace(1)* %out) #1 { +define amdgpu_kernel void @rsq_f32_constant_4.0(float addrspace(1)* %out) #1 { %rsq = call float @llvm.amdgcn.rsq.f32(float 4.0) #0 store float %rsq, float addrspace(1)* %out, align 4 ret void @@ -23,7 +23,7 @@ define void @rsq_f32_constant_4.0(float addrspace(1)* %out) #1 { ; FUNC-LABEL: {{^}}rsq_f32_constant_100.0 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000 -define void @rsq_f32_constant_100.0(float addrspace(1)* %out) #1 { +define amdgpu_kernel void @rsq_f32_constant_100.0(float addrspace(1)* %out) #1 { %rsq = call float @llvm.amdgcn.rsq.f32(float 100.0) #0 store float %rsq, float addrspace(1)* %out, align 4 ret void @@ -31,7 +31,7 @@ define void @rsq_f32_constant_100.0(float addrspace(1)* %out) #1 { ; FUNC-LABEL: {{^}}rsq_f64: ; SI: v_rsq_f64_e32 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} -define void @rsq_f64(double addrspace(1)* %out, double %src) #1 { +define amdgpu_kernel void @rsq_f64(double addrspace(1)* %out, double %src) #1 { %rsq = call double @llvm.amdgcn.rsq.f64(double %src) #0 store double %rsq, double addrspace(1)* %out, align 4 ret void @@ -40,7 +40,7 @@ define void @rsq_f64(double addrspace(1)* %out, double %src) #1 { ; TODO: Really these should be constant folded ; FUNC-LABEL: {{^}}rsq_f64_constant_4.0 ; SI: v_rsq_f64_e32 {{v\[[0-9]+:[0-9]+\]}}, 4.0 -define void @rsq_f64_constant_4.0(double addrspace(1)* %out) #1 { +define amdgpu_kernel void @rsq_f64_constant_4.0(double addrspace(1)* %out) #1 { %rsq = call double @llvm.amdgcn.rsq.f64(double 4.0) #0 store double %rsq, double addrspace(1)* %out, align 4 ret void @@ -50,7 +50,7 @@ define void @rsq_f64_constant_4.0(double addrspace(1)* %out) #1 { ; SI-DAG: s_mov_b32 s{{[0-9]+}}, 0x40590000 ; SI-DAG: s_mov_b32 s{{[0-9]+}}, 0{{$}} ; SI: v_rsq_f64_e32 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} -define void @rsq_f64_constant_100.0(double addrspace(1)* %out) #1 { +define amdgpu_kernel void @rsq_f64_constant_100.0(double addrspace(1)* %out) #1 { %rsq = call double @llvm.amdgcn.rsq.f64(double 100.0) #0 store double %rsq, double addrspace(1)* %out, align 4 ret void @@ -58,7 +58,7 @@ define void @rsq_f64_constant_100.0(double addrspace(1)* %out) #1 { ; FUNC-LABEL: {{^}}rsq_undef_f32: ; SI-NOT: v_rsq_f32 -define void @rsq_undef_f32(float addrspace(1)* %out) #1 { +define amdgpu_kernel void @rsq_undef_f32(float addrspace(1)* %out) #1 { %rsq = call float @llvm.amdgcn.rsq.f32(float undef) store float %rsq, float addrspace(1)* %out, align 4 ret void |