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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-12-20 17:19:44 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-12-20 17:19:44 +0000 |
| commit | 6f9ef14b9dd02a59db00190f1692822740ea34bf (patch) | |
| tree | e0d781510927b98679c27fc24d68c4d8d39a95c8 /llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll | |
| parent | 688114d888db0616f02caedbf0e94bad6a473512 (diff) | |
| download | bcm5719-llvm-6f9ef14b9dd02a59db00190f1692822740ea34bf.tar.gz bcm5719-llvm-6f9ef14b9dd02a59db00190f1692822740ea34bf.zip | |
AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.*
Reviewers: arsenm, nhaehnle, mareko
Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D27834
llvm-svn: 290184
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll index 67c7baba3e1..9cb9f25520b 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll @@ -32,10 +32,10 @@ main_body: ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen ;VI-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, off, s[0:3], 61 offset:4095 ;VI-DAG: s_movk_i32 [[OFS1:s[0-9]+]], 0x7fff -;VI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, off, s[0:3], [[OFS1]] offset:4093 +;VI-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, off, s[0:3], [[OFS1]] offset:4093 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen -;VI: s_mov_b32 [[OFS2:s[0-9]+]], 0x8fff -;VI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, off, s[0:3], [[OFS2]] offset:1 +;VI-DAG: s_mov_b32 [[OFS2:s[0-9]+]], 0x8fff +;VI-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, off, s[0:3], [[OFS2]] offset:1 ;CHECK: s_waitcnt define amdgpu_ps <4 x float> @buffer_load_immoffs_large(<4 x i32> inreg) { main_body: |
