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| author | Artem Tamazov <artem.tamazov@amd.com> | 2016-05-06 17:48:48 +0000 |
|---|---|---|
| committer | Artem Tamazov <artem.tamazov@amd.com> | 2016-05-06 17:48:48 +0000 |
| commit | ebe71ce36a5ffc7f5aa7425f013cfc2cc16bcac4 (patch) | |
| tree | 5d8d8f4f10e67702984f1034c048b82632e5b8e9 /llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll | |
| parent | 93d9b96bdbea3b63e60a991796b68ebc6ac8d7a6 (diff) | |
| download | bcm5719-llvm-ebe71ce36a5ffc7f5aa7425f013cfc2cc16bcac4.tar.gz bcm5719-llvm-ebe71ce36a5ffc7f5aa7425f013cfc2cc16bcac4.zip | |
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.
sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19596
llvm-svn: 268762
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll b/llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll index e0a79482ddc..208d6b7f0ad 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll @@ -4,7 +4,7 @@ ; BOTH-LABEL: {{^}}main: ; BOTH: s_mov_b32 m0, s0 ; VI-NEXT: s_nop 0 -; BOTH-NEXT: s_sendmsg Gs_done(nop) +; BOTH-NEXT: sendmsg(MSG_GS_DONE, GS_OP_NOP) ; BOTH-NEXT: s_endpgm define amdgpu_gs void @main(i32 inreg %a) #0 { |
