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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-26 04:14:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-26 04:14:16 +0000 |
| commit | 0c3e2338febaa58e74e92441f92cd4499e737171 (patch) | |
| tree | d2b7afa2111b1227eab71c1a2d91719524324472 /llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll | |
| parent | bb4d8d30b12a08c915b8b4f36ec96bd2191a9dc3 (diff) | |
| download | bcm5719-llvm-0c3e2338febaa58e74e92441f92cd4499e737171.tar.gz bcm5719-llvm-0c3e2338febaa58e74e92441f92cd4499e737171.zip | |
AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now
Also move into backend intrinsics to discourage use of the old name.
llvm-svn: 258783
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll new file mode 100644 index 00000000000..36b72f14db1 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll @@ -0,0 +1,33 @@ +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone + +; FUNC-LABEL: {{^}}rsq_f32: +; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}} +; EG: RECIPSQRT_IEEE +define void @rsq_f32(float addrspace(1)* %out, float %src) nounwind { + %rsq = call float @llvm.AMDGPU.rsq.f32(float %src) nounwind readnone + store float %rsq, float addrspace(1)* %out, align 4 + ret void +} + +; TODO: Really these should be constant folded +; FUNC-LABEL: {{^}}rsq_f32_constant_4.0 +; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0 +; EG: RECIPSQRT_IEEE +define void @rsq_f32_constant_4.0(float addrspace(1)* %out) nounwind { + %rsq = call float @llvm.AMDGPU.rsq.f32(float 4.0) nounwind readnone + store float %rsq, float addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}rsq_f32_constant_100.0 +; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000 +; EG: RECIPSQRT_IEEE +define void @rsq_f32_constant_100.0(float addrspace(1)* %out) nounwind { + %rsq = call float @llvm.AMDGPU.rsq.f32(float 100.0) nounwind readnone + store float %rsq, float addrspace(1)* %out, align 4 + ret void +} |
