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authorTom Stellard <thomas.stellard@amd.com>2015-06-13 03:28:10 +0000
committerTom Stellard <thomas.stellard@amd.com>2015-06-13 03:28:10 +0000
commit45bb48ea197fe496865387120c7c55b56f0717d6 (patch)
tree3914fb8c4ace9ea4dee024fc944d51dc45adf401 /llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll
parent8fa9677d4eb1cd43973eb59acc12b0534691d604 (diff)
downloadbcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.tar.gz
bcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.zip
R600 -> AMDGPU rename
llvm-svn: 239657
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll23
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll
new file mode 100644
index 00000000000..a59c0ce6d67
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll
@@ -0,0 +1,23 @@
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+
+declare float @llvm.AMDGPU.ldexp.f32(float, i32) nounwind readnone
+declare double @llvm.AMDGPU.ldexp.f64(double, i32) nounwind readnone
+
+; SI-LABEL: {{^}}test_ldexp_f32:
+; SI: v_ldexp_f32
+; SI: s_endpgm
+define void @test_ldexp_f32(float addrspace(1)* %out, float %a, i32 %b) nounwind {
+ %result = call float @llvm.AMDGPU.ldexp.f32(float %a, i32 %b) nounwind readnone
+ store float %result, float addrspace(1)* %out, align 4
+ ret void
+}
+
+; SI-LABEL: {{^}}test_ldexp_f64:
+; SI: v_ldexp_f64
+; SI: s_endpgm
+define void @test_ldexp_f64(double addrspace(1)* %out, double %a, i32 %b) nounwind {
+ %result = call double @llvm.AMDGPU.ldexp.f64(double %a, i32 %b) nounwind readnone
+ store double %result, double addrspace(1)* %out, align 8
+ ret void
+}
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