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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-09-10 02:54:25 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-09-10 02:54:25 +0000 |
| commit | 72d27f5525f1fde0e95bcf74ec8f543ab96a36d9 (patch) | |
| tree | 0324d90398fb7211e2cd5fc001b85dd8965b7c7b /llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll | |
| parent | b082c36061d68ce983885e5f8a1452e69da4e965 (diff) | |
| download | bcm5719-llvm-72d27f5525f1fde0e95bcf74ec8f543ab96a36d9.tar.gz bcm5719-llvm-72d27f5525f1fde0e95bcf74ec8f543ab96a36d9.zip | |
AMDGPU: Fix tests using old number for constant address space
llvm-svn: 341770
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll index 595f632b493..6374c9e02ed 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll @@ -20,7 +20,7 @@ main_body: ; SI: v_cmp_gt_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], 0, v{{[0-9]+}} ; SI: v_cmpx_le_f32_e32 vcc, 0, v{{[0-9]+}} ; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1.0, [[CMP]] -define amdgpu_ps void @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <4 x i32>] addrspace(2)* byval %arg2, [34 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) { +define amdgpu_ps void @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(4)* byval %arg, [17 x <16 x i8>] addrspace(4)* byval %arg1, [17 x <4 x i32>] addrspace(4)* byval %arg2, [34 x <8 x i32>] addrspace(4)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) { entry: %tmp0 = fcmp olt float %arg13, 0.000000e+00 call void @llvm.AMDGPU.kill(float %arg14) |
