diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2016-11-04 13:06:34 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-11-04 13:06:34 +0000 |
| commit | 2d2d33f1dc4c976ab41ab5fc814f2aca7fdd99d1 (patch) | |
| tree | b1336f93f40986897fd9aa4af80101e2bef34751 /llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll | |
| parent | 050f958519c8c3d825c27777c0bd6c6df58798d9 (diff) | |
| download | bcm5719-llvm-2d2d33f1dc4c976ab41ab5fc814f2aca7fdd99d1.tar.gz bcm5719-llvm-2d2d33f1dc4c976ab41ab5fc814f2aca7fdd99d1.zip | |
Revert "AMDGPU: Add VI i16 support"
This reverts commit r285939 and r285948. These broke some conformance tests.
llvm-svn: 285995
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll index bf5d492dca4..541119242a9 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll @@ -1,6 +1,5 @@ -; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfe.u32(i32, i32, i32) nounwind readnone @@ -74,14 +73,11 @@ define void @bfe_u32_zextload_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) n } ; FUNC-LABEL: {{^}}bfe_u32_zext_in_reg_i8: -; GCN: buffer_load_dword +; SI: buffer_load_dword ; SI: v_add_i32 ; SI-NEXT: v_and_b32_e32 -; FIXME: Should be using s_add_i32 -; VI: v_add_i32 -; VI-NEXT: v_and_b32_e32 ; SI-NOT: {{[^@]}}bfe -; GCN: s_endpgm +; SI: s_endpgm define void @bfe_u32_zext_in_reg_i8(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { %load = load i32, i32 addrspace(1)* %in, align 4 %add = add i32 %load, 1 |
