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| author | Marek Olsak <marek.olsak@amd.com> | 2015-11-25 21:22:45 +0000 |
|---|---|---|
| committer | Marek Olsak <marek.olsak@amd.com> | 2015-11-25 21:22:45 +0000 |
| commit | 7ed6b2f414a2760ebc6510b059bb1db096d677c2 (patch) | |
| tree | 3fc7ad61b208cc034674eb4b5d0af5e8116053d3 /llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll | |
| parent | 80e34e0a189a297db76db86580e0716827f7fef2 (diff) | |
| download | bcm5719-llvm-7ed6b2f414a2760ebc6510b059bb1db096d677c2.tar.gz bcm5719-llvm-7ed6b2f414a2760ebc6510b059bb1db096d677c2.zip | |
AMDGPU/SI: select S_ABS_I32 when possible (v2)
v2: added more tests, moved the SALU->VALU conversion to a separate function
It looks like it's not possible to get subregisters in the S_ABS lowering
code, and I don't feel like guessing without testing what the correct code
would look like.
llvm-svn: 254095
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll index 8bf094b8bc7..ca8ddbae9fb 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll @@ -8,9 +8,7 @@ declare i32 @llvm.AMDGPU.abs(i32) nounwind readnone declare i32 @llvm.AMDIL.abs.i32(i32) nounwind readnone ; FUNC-LABEL: {{^}}s_abs_i32: -; SI: s_sub_i32 -; SI: s_max_i32 -; SI: s_endpgm +; SI: s_abs_i32 ; EG: SUB_INT ; EG: MAX_INT |
