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authorTom Stellard <thomas.stellard@amd.com>2016-12-06 21:53:10 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-12-06 21:53:10 +0000
commit175959e35016fe22d6f4f9dbbd92aad47f442dbc (patch)
tree89e990ec91b4806637f4dd956e2945b92cfa69a8 /llvm/test/CodeGen/AMDGPU/kernel-args.ll
parent043e66137c01de5d9f9bf49b471036959018d7d8 (diff)
downloadbcm5719-llvm-175959e35016fe22d6f4f9dbbd92aad47f442dbc.tar.gz
bcm5719-llvm-175959e35016fe22d6f4f9dbbd92aad47f442dbc.zip
AMDGPU/SI: Set correct value for amd_kernel_code_t::kernarg_segment_alignment
Reviewers: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D27416 llvm-svn: 288852
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/kernel-args.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/kernel-args.ll28
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/kernel-args.ll b/llvm/test/CodeGen/AMDGPU/kernel-args.ll
index dcb2ddbb9b6..b1f20fd995f 100644
--- a/llvm/test/CodeGen/AMDGPU/kernel-args.ll
+++ b/llvm/test/CodeGen/AMDGPU/kernel-args.ll
@@ -5,6 +5,7 @@
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; FUNC-LABEL: {{^}}i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: AND_INT {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
; MESA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
@@ -24,6 +25,7 @@ entry:
}
; FUNC-LABEL: {{^}}i8_zext_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -42,6 +44,7 @@ entry:
}
; FUNC-LABEL: {{^}}i8_sext_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -60,6 +63,7 @@ entry:
}
; FUNC-LABEL: {{^}}i16_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: AND_INT {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
; MESA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
@@ -79,6 +83,7 @@ entry:
}
; FUNC-LABEL: {{^}}i16_zext_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -97,6 +102,7 @@ entry:
}
; FUNC-LABEL: {{^}}i16_sext_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -115,6 +121,7 @@ entry:
}
; FUNC-LABEL: {{^}}i32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: T{{[0-9]\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -126,6 +133,7 @@ entry:
}
; FUNC-LABEL: {{^}}f32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: T{{[0-9]\.[XYZW]}}, KC0[2].Z
; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
@@ -137,6 +145,7 @@ entry:
}
; FUNC-LABEL: {{^}}v2i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_8
; EG: VTX_READ_8
; MESA-GCN: buffer_load_ubyte
@@ -150,6 +159,7 @@ entry:
}
; FUNC-LABEL: {{^}}v2i16_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_16
; EG: VTX_READ_16
; MESA-GCN: buffer_load_ushort
@@ -163,6 +173,7 @@ entry:
}
; FUNC-LABEL: {{^}}v2i32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].X
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[2].W
; SI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0xb
@@ -175,6 +186,7 @@ entry:
}
; FUNC-LABEL: {{^}}v2f32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].X
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[2].W
; SI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0xb
@@ -187,6 +199,7 @@ entry:
}
; FUNC-LABEL: {{^}}v3i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: VTX_READ_8 T{{[0-9]}}.X, T{{[0-9]}}.X, 40
; EG-DAG: VTX_READ_8 T{{[0-9]}}.X, T{{[0-9]}}.X, 41
; EG-DAG: VTX_READ_8 T{{[0-9]}}.X, T{{[0-9]}}.X, 42
@@ -203,6 +216,7 @@ entry:
}
; FUNC-LABEL: {{^}}v3i16_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: VTX_READ_16 T{{[0-9]}}.X, T{{[0-9]}}.X, 44
; EG-DAG: VTX_READ_16 T{{[0-9]}}.X, T{{[0-9]}}.X, 46
; EG-DAG: VTX_READ_16 T{{[0-9]}}.X, T{{[0-9]}}.X, 48
@@ -218,6 +232,7 @@ entry:
ret void
}
; FUNC-LABEL: {{^}}v3i32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].W
@@ -231,6 +246,7 @@ entry:
}
; FUNC-LABEL: {{^}}v3f32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].W
@@ -244,6 +260,7 @@ entry:
}
; FUNC-LABEL: {{^}}v4i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_8
; EG: VTX_READ_8
; EG: VTX_READ_8
@@ -263,6 +280,7 @@ entry:
}
; FUNC-LABEL: {{^}}v4i16_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_16
; EG: VTX_READ_16
; EG: VTX_READ_16
@@ -282,6 +300,7 @@ entry:
}
; FUNC-LABEL: {{^}}v4i32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].W
@@ -296,6 +315,7 @@ entry:
}
; FUNC-LABEL: {{^}}v4f32_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[3].W
@@ -310,6 +330,7 @@ entry:
}
; FUNC-LABEL: {{^}}v8i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_8
; EG: VTX_READ_8
; EG: VTX_READ_8
@@ -340,6 +361,7 @@ entry:
}
; FUNC-LABEL: {{^}}v8i16_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_16
; EG: VTX_READ_16
; EG: VTX_READ_16
@@ -371,6 +393,7 @@ entry:
}
; FUNC-LABEL: {{^}}v8i32_arg:
+; HSA-VI: kernarg_segment_alignment = 5
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].W
@@ -389,6 +412,7 @@ entry:
}
; FUNC-LABEL: {{^}}v8f32_arg:
+; HSA-VI: kernarg_segment_alignment = 5
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[4].W
@@ -405,6 +429,7 @@ entry:
}
; FUNC-LABEL: {{^}}v16i8_arg:
+; HSA-VI: kernarg_segment_alignment = 4
; EG: VTX_READ_8
; EG: VTX_READ_8
; EG: VTX_READ_8
@@ -460,6 +485,7 @@ entry:
}
; FUNC-LABEL: {{^}}v16i16_arg:
+; HSA-VI: kernarg_segment_alignment = 5
; EG: VTX_READ_16
; EG: VTX_READ_16
; EG: VTX_READ_16
@@ -515,6 +541,7 @@ entry:
}
; FUNC-LABEL: {{^}}v16i32_arg:
+; HSA-VI: kernarg_segment_alignment = 6
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].W
@@ -541,6 +568,7 @@ entry:
}
; FUNC-LABEL: {{^}}v16f32_arg:
+; HSA-VI: kernarg_segment_alignment = 6
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].Y
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].Z
; EG-DAG: T{{[0-9]\.[XYZW]}}, KC0[6].W
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