diff options
| author | Neil Henning <neil.henning@amd.com> | 2018-12-12 16:15:21 +0000 |
|---|---|---|
| committer | Neil Henning <neil.henning@amd.com> | 2018-12-12 16:15:21 +0000 |
| commit | 76504a4c5e196aac50afe65f1db55345b9a01b7e (patch) | |
| tree | bacefc350bd264ec596c3b27c90fe518e97d8d38 /llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | |
| parent | ef8683abec6b4f36cef4bba2fd6a4b69f0e59f22 (diff) | |
| download | bcm5719-llvm-76504a4c5e196aac50afe65f1db55345b9a01b7e.tar.gz bcm5719-llvm-76504a4c5e196aac50afe65f1db55345b9a01b7e.zip | |
[AMDGPU] Extend the SI Load/Store optimizer to combine more things.
I've extended the load/store optimizer to be able to produce dwordx3
loads and stores, This change allows many more load/stores to be combined,
and results in much more optimal code for our hardware.
Differential Revision: https://reviews.llvm.org/D54042
llvm-svn: 348937
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll index cf19486dfca..93ee16ea85d 100644 --- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll +++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll @@ -103,8 +103,7 @@ define amdgpu_kernel void @dynamic_insertelement_v2f32(<2 x float> addrspace(1)* ; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, [[CONST]], v{{[0-9]+}}, [[CC2]] ; GCN-DAG: v_cmp_ne_u32_e64 [[CC1:[^,]+]], [[IDX]], 0 ; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, [[CONST]], v{{[0-9]+}}, [[CC1]] -; GCN-DAG: buffer_store_dwordx2 v -; GCN-DAG: buffer_store_dword v +; GCN-DAG: buffer_store_dwordx3 v define amdgpu_kernel void @dynamic_insertelement_v3f32(<3 x float> addrspace(1)* %out, <3 x float> %a, i32 %b) nounwind { %vecins = insertelement <3 x float> %a, float 5.000000e+00, i32 %b store <3 x float> %vecins, <3 x float> addrspace(1)* %out, align 16 @@ -173,8 +172,7 @@ define amdgpu_kernel void @dynamic_insertelement_v2i32(<2 x i32> addrspace(1)* % ; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, 5, v{{[0-9]+}}, [[CC2]] ; GCN-DAG: v_cmp_ne_u32_e64 [[CC1:[^,]+]], [[IDX]], 0 ; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, 5, v{{[0-9]+}}, [[CC1]] -; GCN-DAG: buffer_store_dwordx2 v -; GCN-DAG: buffer_store_dword v +; GCN-DAG: buffer_store_dwordx3 v define amdgpu_kernel void @dynamic_insertelement_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a, i32 %b) nounwind { %vecins = insertelement <3 x i32> %a, i32 5, i32 %b store <3 x i32> %vecins, <3 x i32> addrspace(1)* %out, align 16 |
