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| author | Mark Searles <m.c.searles@gmail.com> | 2018-04-26 16:11:19 +0000 |
|---|---|---|
| committer | Mark Searles <m.c.searles@gmail.com> | 2018-04-26 16:11:19 +0000 |
| commit | 2a19af6e17545234f96c7d10a80c5b5992731ced (patch) | |
| tree | 87807d866ec271eef39c82a9968e931cf1f7f40b /llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | |
| parent | f4a9d56a9a413e2d9d9a7ebd353304f9bf9a0d0a (diff) | |
| download | bcm5719-llvm-2a19af6e17545234f96c7d10a80c5b5992731ced.tar.gz bcm5719-llvm-2a19af6e17545234f96c7d10a80c5b5992731ced.zip | |
[AMDGPU][Waitcnt] As of gfx7, VMEM operations do not increment the export counter and the input registers are available in the next instruction; update the waitcnt pass to take this into account.
Differential Revision: https://reviews.llvm.org/D46067
llvm-svn: 330954
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll index 79e1943f8fb..13b6c1aa9f1 100644 --- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll +++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll @@ -217,7 +217,7 @@ define amdgpu_kernel void @dynamic_insertelement_v3i16(<3 x i16> addrspace(1)* % ; GCN-DAG: buffer_store_short v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offset:8 ; GCN: buffer_store_short v{{[0-9]+}}, [[IDX]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}} -; GCN: s_waitcnt +; GCN-NO-TONGA: s_waitcnt expcnt ; GCN: buffer_load_dwordx2 |
