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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-04-15 20:42:18 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-04-15 20:42:18 +0000 |
| commit | fbdd2a18874d216c40b2aced5083416c6150402c (patch) | |
| tree | 8288bb3ca51336ed437a1df8d3da622885ae6abf /llvm/test/CodeGen/AMDGPU/inline-asm.ll | |
| parent | e0eb13135f96157e0b05f87729ada87989c72bd4 (diff) | |
| download | bcm5719-llvm-fbdd2a18874d216c40b2aced5083416c6150402c.tar.gz bcm5719-llvm-fbdd2a18874d216c40b2aced5083416c6150402c.zip | |
AMDGPU: Fix printed format of SReg_96
These are artificial, so I think this should only come up with inline
asm comments.
llvm-svn: 358446
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/inline-asm.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/inline-asm.ll | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm.ll b/llvm/test/CodeGen/AMDGPU/inline-asm.ll index 9615efaaa93..6a97626c7b0 100644 --- a/llvm/test/CodeGen/AMDGPU/inline-asm.ll +++ b/llvm/test/CodeGen/AMDGPU/inline-asm.ll @@ -267,3 +267,13 @@ entry: tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1 ret void } + +; Make sure tuples of 3 SGPRs are printed with the [] syntax instead +; of the tablegen default. +; CHECK-LABEL: {{^}}sgpr96_name_format: +; CHECK: ; sgpr96 s[0:2] +define amdgpu_kernel void @sgpr96_name_format() { +entry: + tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1 + ret void +} |
