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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-05-17 21:56:25 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-05-17 21:56:25 +0000 |
| commit | 2b1f9aa5773d5d105ebd3812745e36038f48f541 (patch) | |
| tree | 6f58dc77c8d0c69cc82e3cb8c23da33493b75570 /llvm/test/CodeGen/AMDGPU/inline-asm.ll | |
| parent | f6c61ef64d1293a0531cbcd0afeb2a401edd501e (diff) | |
| download | bcm5719-llvm-2b1f9aa5773d5d105ebd3812745e36038f48f541.tar.gz bcm5719-llvm-2b1f9aa5773d5d105ebd3812745e36038f48f541.zip | |
AMDGPU: Start defining a calling convention
Partially implement callee-side for arguments and return values.
byval doesn't work properly, and most likely sret or other on-stack
return values most as well.
llvm-svn: 303308
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/inline-asm.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/inline-asm.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm.ll b/llvm/test/CodeGen/AMDGPU/inline-asm.ll index 636b45db698..36441cf778c 100644 --- a/llvm/test/CodeGen/AMDGPU/inline-asm.ll +++ b/llvm/test/CodeGen/AMDGPU/inline-asm.ll @@ -191,7 +191,7 @@ entry: ; CHECK: v_mov_b32_e32 v0, s0 ; CHECK: v_mov_b32_e32 v1, s1 ; CHECK: use v[0:1] -define void @i64_imm_input_phys_vgpr() { +define amdgpu_kernel void @i64_imm_input_phys_vgpr() { entry: call void asm sideeffect "; use $0 ", "{VGPR0_VGPR1}"(i64 123456) ret void |
