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| author | Matthias Braun <matze@braunis.de> | 2016-06-25 00:23:00 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2016-06-25 00:23:00 +0000 |
| commit | 6ad3d05b681b36f6ecc98523257d154053e4116d (patch) | |
| tree | 24b369fa9b80c5e05322ab4eb95e2a64816f55b4 /llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | |
| parent | 62f19e700d3126415bb443162501eefe22cf1811 (diff) | |
| download | bcm5719-llvm-6ad3d05b681b36f6ecc98523257d154053e4116d.tar.gz bcm5719-llvm-6ad3d05b681b36f6ecc98523257d154053e4116d.zip | |
MachineScheduler: Fully compare top/bottom candidates
In bidirectional scheduling this gives more stable results than just
comparing the "reason" fields of the top/bottom node because the reason
field may be higher depending on what other nodes are in the queue.
Differential Revision: http://reviews.llvm.org/D19401
llvm-svn: 273755
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll b/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll index d5120ba74e6..c4e54a737f1 100644 --- a/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll +++ b/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll @@ -179,7 +179,7 @@ entry: ; CHECK-LABEL: {{^}}extract_vgpr_offset_multiple_in_block: -; CHECK: {{buffer|flat}}_load_dword [[IDX0:v[0-9]+]] +; CHECK-DAG: {{buffer|flat}}_load_dword [[IDX0:v[0-9]+]] ; CHECK-DAG: s_mov_b32 [[S_ELT0:s[0-9]+]], 7 ; CHECK-DAG: s_mov_b32 [[S_ELT1:s[0-9]+]], 9 ; CHECK-DAG: v_mov_b32_e32 [[VEC_ELT0:v[0-9]+]], [[S_ELT0]] @@ -199,7 +199,7 @@ entry: ; FIXME: Redundant copy ; CHECK: s_mov_b64 exec, [[MASK]] -; CHECK: s_mov_b64 [[MASK]], exec +; CHECK: s_mov_b64 [[MASK2:s\[[0-9]+:[0-9]+\]]], exec ; CHECK: [[LOOP1:BB[0-9]+_[0-9]+]]: ; CHECK: v_readfirstlane_b32 vcc_lo, [[IDX0]] |
