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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 00:43:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 00:43:42 +0000 |
| commit | acc5e82b0e33a27ba64ccb4f88c81fe8709d4576 (patch) | |
| tree | de36eb055031183f0de7f2f65c688c27091bb987 /llvm/test/CodeGen/AMDGPU/function-args.ll | |
| parent | 6b898beb8e6bf5739d43c1d64646264afc595de8 (diff) | |
| download | bcm5719-llvm-acc5e82b0e33a27ba64ccb4f88c81fe8709d4576.tar.gz bcm5719-llvm-acc5e82b0e33a27ba64ccb4f88c81fe8709d4576.zip | |
DAG: Undo and->or combine with FrameIndexes
This pattern shows up when lowering byval copies on AMDGPU.
The byval object access is split into 4-byte chunks, adding a
constant offset to the FixedStack base. When some of the offsets
turn into ors, this prevents combining the constant offsets.
This makes it not apparent that the object is there when matching
addressing modes, so it ends up using a scratch wave offset
relative access and the lengthy frame index expansion for that.
llvm-svn: 309775
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/function-args.ll')
0 files changed, 0 insertions, 0 deletions
