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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-30 22:51:26 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-30 22:51:26 +0000 |
| commit | 84445dd13c4b3b783e63ff9ebd5871b1ae7386d8 (patch) | |
| tree | 0be329bb21a8eb142540840cc66191abaee437bf /llvm/test/CodeGen/AMDGPU/function-args.ll | |
| parent | ba4014e9dce96618ab4d8f820447df2a86023b74 (diff) | |
| download | bcm5719-llvm-84445dd13c4b3b783e63ff9ebd5871b1ae7386d8.tar.gz bcm5719-llvm-84445dd13c4b3b783e63ff9ebd5871b1ae7386d8.zip | |
AMDGPU: Use gfx9 carry-less add/sub instructions
llvm-svn: 319491
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/function-args.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/function-args.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/function-args.ll b/llvm/test/CodeGen/AMDGPU/function-args.ll index 7620f0ecddc..ca36732540b 100644 --- a/llvm/test/CodeGen/AMDGPU/function-args.ll +++ b/llvm/test/CodeGen/AMDGPU/function-args.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=CI %s -; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s -; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s +; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI,CIVI %s +; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,CIVI,GFX89 %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,GFX89 %s ; GCN-LABEL: {{^}}void_func_i1: ; GCN: v_and_b32_e32 v0, 1, v0 @@ -24,7 +24,7 @@ define void @void_func_i1_zeroext(i1 zeroext %arg0) #0 { ; GCN-LABEL: {{^}}void_func_i1_signext: ; GCN: s_waitcnt -; GCN-NEXT: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 12, v0 +; GCN-NEXT: v_add_{{i|u}}32_e32 v0, {{(vcc, )?}}12, v0 ; GCN-NOT: v0 ; GCN: buffer_store_dword v0, off define void @void_func_i1_signext(i1 signext %arg0) #0 { @@ -60,7 +60,7 @@ define void @void_func_i8(i8 %arg0) #0 { ; GCN-LABEL: {{^}}void_func_i8_zeroext: ; GCN-NOT: and_b32 -; GCN: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 12, v0 +; GCN: v_add_{{i|u}}32_e32 v0, {{(vcc, )?}}12, v0 define void @void_func_i8_zeroext(i8 zeroext %arg0) #0 { %ext = zext i8 %arg0 to i32 %add = add i32 %ext, 12 @@ -70,7 +70,7 @@ define void @void_func_i8_zeroext(i8 zeroext %arg0) #0 { ; GCN-LABEL: {{^}}void_func_i8_signext: ; GCN-NOT: v_bfe_i32 -; GCN: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 12, v0 +; GCN: v_add_{{i|u}}32_e32 v0, {{(vcc, )?}}12, v0 define void @void_func_i8_signext(i8 signext %arg0) #0 { %ext = sext i8 %arg0 to i32 %add = add i32 %ext, 12 @@ -87,7 +87,7 @@ define void @void_func_i16(i16 %arg0) #0 { ; GCN-LABEL: {{^}}void_func_i16_zeroext: ; GCN-NOT: v0 -; GCN: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 12, v0 +; GCN: v_add_{{i|u}}32_e32 v0, {{(vcc, )?}}12, v0 define void @void_func_i16_zeroext(i16 zeroext %arg0) #0 { %ext = zext i16 %arg0 to i32 %add = add i32 %ext, 12 @@ -97,7 +97,7 @@ define void @void_func_i16_zeroext(i16 zeroext %arg0) #0 { ; GCN-LABEL: {{^}}void_func_i16_signext: ; GCN-NOT: v0 -; GCN: v_add{{(_co)?}}_{{i|u}}32_e32 v0, vcc, 12, v0 +; GCN: v_add_{{i|u}}32_e32 v0, {{(vcc, )?}}12, v0 define void @void_func_i16_signext(i16 signext %arg0) #0 { %ext = sext i16 %arg0 to i32 %add = add i32 %ext, 12 @@ -582,7 +582,7 @@ define void @void_func_v32i32_i32_i64(<32 x i32> %arg0, i32 %arg1, i64 %arg2) #0 ; GCN: buffer_store_byte [[TRUNC_ARG1_I1]], off ; GCN: buffer_store_byte [[LOAD_ARG2]], off ; GCN: buffer_store_short [[LOAD_ARG3]], off -; VI: buffer_store_short [[LOAD_ARG4]], off +; GFX89 buffer_store_short [[LOAD_ARG4]], off ; CI: buffer_store_short [[CVT_ARG4]], off define void @void_func_v32i32_i1_i8_i16(<32 x i32> %arg0, i1 %arg1, i8 %arg2, i16 %arg3, half %arg4) #0 { |
