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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-10-13 21:10:22 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-10-13 21:10:22 +0000
commite11d8aca77dcdd17a8a25bdf84f0e13d57e53d41 (patch)
tree84ac8959676371349d6635df3c0b2dbafb839d37 /llvm/test/CodeGen/AMDGPU/fneg.ll
parent868783e85557dde30923fab94c7ffabf5e271818 (diff)
downloadbcm5719-llvm-e11d8aca77dcdd17a8a25bdf84f0e13d57e53d41.tar.gz
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AMDGPU: Implement hasBitPreservingFPLogic
llvm-svn: 315754
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/fneg.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/fneg.ll12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fneg.ll b/llvm/test/CodeGen/AMDGPU/fneg.ll
index d1eabfb13c9..94ec61622bd 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg.ll
@@ -84,3 +84,15 @@ define amdgpu_kernel void @fneg_fold_f32(float addrspace(1)* %out, float %in) {
store float %fmul, float addrspace(1)* %out
ret void
}
+
+; Make sure we turn some integer operations back into fabs
+; FUNC-LABEL: {{^}}bitpreserve_fneg_f32:
+; GCN: v_mul_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, -4.0
+define amdgpu_kernel void @bitpreserve_fneg_f32(float addrspace(1)* %out, float %in) {
+ %in.bc = bitcast float %in to i32
+ %int.abs = xor i32 %in.bc, 2147483648
+ %bc = bitcast i32 %int.abs to float
+ %fadd = fmul float %bc, 4.0
+ store float %fadd, float addrspace(1)* %out
+ ret void
+}
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