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authorMatthias Braun <matze@braunis.de>2017-03-02 00:35:08 +0000
committerMatthias Braun <matze@braunis.de>2017-03-02 00:35:08 +0000
commitdbcf9e2ee4602006df8e472e5cd18a64cecbdced (patch)
treea424829a4f70f31140a3329e6b23ad1572e03e49 /llvm/test/CodeGen/AMDGPU/fneg-combines.ll
parent3095856d80620ed8a39f92a76fa5d03c78610bee (diff)
downloadbcm5719-llvm-dbcf9e2ee4602006df8e472e5cd18a64cecbdced.tar.gz
bcm5719-llvm-dbcf9e2ee4602006df8e472e5cd18a64cecbdced.zip
LiveRegMatrix: Fix some subreg interference checks
Surprisingly, one of the three interference checks in LiveRegMatrix was using the main live range instead of the apropriate subregister range resulting in unnecessarily conservative results. llvm-svn: 296722
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/fneg-combines.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/fneg-combines.ll3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fneg-combines.ll b/llvm/test/CodeGen/AMDGPU/fneg-combines.ll
index 41f31de18e6..acd4f7ee4a8 100644
--- a/llvm/test/CodeGen/AMDGPU/fneg-combines.ll
+++ b/llvm/test/CodeGen/AMDGPU/fneg-combines.ll
@@ -1195,9 +1195,8 @@ define void @v_fneg_fp_round_fneg_f64_to_f32(float addrspace(1)* %out, double ad
; GCN: {{buffer|flat}}_load_dwordx2 v{{\[}}[[A_LO:[0-9]+]]:[[A_HI:[0-9]+]]{{\]}}
; GCN-DAG: v_cvt_f32_f64_e32 [[RESULT:v[0-9]+]], v{{\[}}[[A_LO]]:[[A_HI]]{{\]}}
; GCN-DAG: v_xor_b32_e32 v[[NEG_A_HI:[0-9]+]], 0x80000000, v[[A_HI]]
-; GCN-DAG: v_mov_b32_e32 v[[NEG_A_LO:[0-9]+]], v[[A_LO]]
; GCN: buffer_store_dword [[RESULT]]
-; GCN: buffer_store_dwordx2 v{{\[}}[[NEG_A_LO]]:[[NEG_A_HI]]{{\]}}
+; GCN: buffer_store_dwordx2 v{{\[}}[[A_LO]]:[[NEG_A_HI]]{{\]}}
define void @v_fneg_fp_round_store_use_fneg_f64_to_f32(float addrspace(1)* %out, double addrspace(1)* %a.ptr) #0 {
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = sext i32 %tid to i64
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