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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-05-22 16:58:10 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-05-22 16:58:10 +0000 |
| commit | 5fa289f0d8ff85b9e14d2f814a90761378ab54ae (patch) | |
| tree | fed99a180eebde775b59f959727b7b5934508512 /llvm/test/CodeGen/AMDGPU/fmed3.ll | |
| parent | 80cb549c2fb973ffa84276b6144e0aa65ef690c9 (diff) | |
| download | bcm5719-llvm-5fa289f0d8ff85b9e14d2f814a90761378ab54ae.tar.gz bcm5719-llvm-5fa289f0d8ff85b9e14d2f814a90761378ab54ae.zip | |
[AMDGPU] Narrow lshl from 64 to 32 bit if possible
Turn expensive 64 bit shift into 32 bit if shift does not overflow int:
shl (ext x) => zext (shl x)
Differential Revision: https://reviews.llvm.org/D33367
llvm-svn: 303569
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/fmed3.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/fmed3.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fmed3.ll b/llvm/test/CodeGen/AMDGPU/fmed3.ll index d2cfc713ed3..27d9261b1fa 100644 --- a/llvm/test/CodeGen/AMDGPU/fmed3.ll +++ b/llvm/test/CodeGen/AMDGPU/fmed3.ll @@ -845,10 +845,10 @@ define amdgpu_kernel void @v_nnan_inputs_missing2_med3_f32_pat0(float addrspace( ; GCN: {{buffer_|flat_}}load_dword [[A:v[0-9]+]] ; GCN: {{buffer_|flat_}}load_dword [[B:v[0-9]+]] ; GCN: {{buffer_|flat_}}load_dword [[C:v[0-9]+]] -; GCN: v_min_f32 -; GCN: v_max_f32 -; GCN: v_min_f32 -; GCN: v_max_f32 +; GCN-DAG: v_min_f32 +; GCN-DAG: v_max_f32 +; GCN-DAG: v_min_f32 +; GCN-DAG: v_max_f32 define amdgpu_kernel void @v_test_global_nnans_med3_f32_pat0_srcmod0_mismatch(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid |
