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| author | Marek Olsak <marek.olsak@amd.com> | 2016-12-09 19:49:48 +0000 |
|---|---|---|
| committer | Marek Olsak <marek.olsak@amd.com> | 2016-12-09 19:49:48 +0000 |
| commit | 693e9be9181eb8b3cc91e254a2acb49accafbd9c (patch) | |
| tree | ab20f69676574812c4cb167ea1e0a44a85374fbc /llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll | |
| parent | 91f22fbf4f5285586dfe8ca5e09a1880e82a2eb3 (diff) | |
| download | bcm5719-llvm-693e9be9181eb8b3cc91e254a2acb49accafbd9c.tar.gz bcm5719-llvm-693e9be9181eb8b3cc91e254a2acb49accafbd9c.zip | |
AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objects
Summary: This frees 2 scalar registers.
Reviewers: tstellarAMD
Subscribers: qcolombet, arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D27150
llvm-svn: 289261
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll | 55 |
1 files changed, 34 insertions, 21 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll b/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll index d8807e638fb..1ee9100c2eb 100644 --- a/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll +++ b/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll @@ -1,18 +1,20 @@ -; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=NOXNACK -check-prefix=CI -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=NOXNACK -check-prefix=VI -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=XNACK -check-prefix=VI -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=stoney -verify-machineinstrs < %s | FileCheck -check-prefix=XNACK -check-prefix=VI -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=VI-NOXNACK -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=stoney -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=NOXNACK -check-prefix=HSA-NOXNACK -check-prefix=HSA -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=NOXNACK -check-prefix=HSA-NOXNACK -check-prefix=HSA -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=XNACK -check-prefix=HSA-XNACK -check-prefix=HSA -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-CI -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-VI-NOXNACK -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-VI-XNACK -check-prefix=GCN %s ; GCN-LABEL: {{^}}no_vcc_no_flat: -; HSA-NOXNACK: is_xnack_enabled = 0 -; HSA-XNACK: is_xnack_enabled = 1 +; HSA-CI: is_xnack_enabled = 0 +; HSA-VI-NOXNACK: is_xnack_enabled = 0 +; HSA-VI-XNACK: is_xnack_enabled = 1 -; NOXNACK: ; NumSgprs: 8 -; XNACK: ; NumSgprs: 12 +; CI: ; NumSgprs: 8 +; VI-NOXNACK: ; NumSgprs: 8 +; VI-XNACK: ; NumSgprs: 12 define void @no_vcc_no_flat() { entry: call void asm sideeffect "", "~{SGPR7}"() @@ -20,11 +22,13 @@ entry: } ; GCN-LABEL: {{^}}vcc_no_flat: -; HSA-NOXNACK: is_xnack_enabled = 0 -; HSA-XNACK: is_xnack_enabled = 1 +; HSA-CI: is_xnack_enabled = 0 +; HSA-VI-NOXNACK: is_xnack_enabled = 0 +; HSA-VI-XNACK: is_xnack_enabled = 1 -; NOXNACK: ; NumSgprs: 10 -; XNACK: ; NumSgprs: 12 +; CI: ; NumSgprs: 10 +; VI-NOXNACK: ; NumSgprs: 10 +; VI-XNACK: ; NumSgprs: 12 define void @vcc_no_flat() { entry: call void asm sideeffect "", "~{SGPR7},~{VCC}"() @@ -32,11 +36,16 @@ entry: } ; GCN-LABEL: {{^}}no_vcc_flat: -; HSA-NOXNACK: is_xnack_enabled = 0 -; HSA-XNACK: is_xnack_enabled = 1 +; HSA-CI: is_xnack_enabled = 0 +; HSA-VI-NOXNACK: is_xnack_enabled = 0 +; HSA-VI-XNACK: is_xnack_enabled = 1 -; CI: ; NumSgprs: 12 -; VI: ; NumSgprs: 14 +; CI: ; NumSgprs: 8 +; VI-NOXNACK: ; NumSgprs: 8 +; VI-XNACK: ; NumSgprs: 12 +; HSA-CI: ; NumSgprs: 8 +; HSA-VI-NOXNACK: ; NumSgprs: 8 +; HSA-VI-XNACK: ; NumSgprs: 12 define void @no_vcc_flat() { entry: call void asm sideeffect "", "~{SGPR7},~{FLAT_SCR}"() @@ -47,8 +56,12 @@ entry: ; HSA-NOXNACK: is_xnack_enabled = 0 ; HSA-XNACK: is_xnack_enabled = 1 -; CI: ; NumSgprs: 12 -; VI: ; NumSgprs: 14 +; CI: ; NumSgprs: 10 +; VI-NOXNACK: ; NumSgprs: 10 +; VI-XNACK: ; NumSgprs: 12 +; HSA-CI: ; NumSgprs: 10 +; HSA-VI-NOXNACK: ; NumSgprs: 10 +; HSA-VI-XNACK: ; NumSgprs: 12 define void @vcc_flat() { entry: call void asm sideeffect "", "~{SGPR7},~{VCC},~{FLAT_SCR}"() |
