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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-11 06:02:01 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-11 06:02:01 +0000 |
commit | 9c47dd583a94f457411df5403eff4228cc3690cd (patch) | |
tree | bf0d49daf75b9ec932dc33135e9c6c8c193d9f3c /llvm/test/CodeGen/AMDGPU/ds_read2st64.ll | |
parent | 4244be25bd7c438ac755813ff33e6e80ca6b6f34 (diff) | |
download | bcm5719-llvm-9c47dd583a94f457411df5403eff4228cc3690cd.tar.gz bcm5719-llvm-9c47dd583a94f457411df5403eff4228cc3690cd.zip |
AMDGPU: Remove some old intrinsic uses from tests
llvm-svn: 260493
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/ds_read2st64.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/ds_read2st64.ll | 36 |
1 files changed, 15 insertions, 21 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/ds_read2st64.ll b/llvm/test/CodeGen/AMDGPU/ds_read2st64.ll index 4a0571ea16f..4c26b3ad8d7 100644 --- a/llvm/test/CodeGen/AMDGPU/ds_read2st64.ll +++ b/llvm/test/CodeGen/AMDGPU/ds_read2st64.ll @@ -11,7 +11,7 @@ ; SI: buffer_store_dword [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f32_0_1(float addrspace(1)* %out) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i %val0 = load float, float addrspace(3)* %arrayidx0, align 4 %add.x = add nsw i32 %x.i, 64 @@ -30,7 +30,7 @@ define void @simple_read2st64_f32_0_1(float addrspace(1)* %out) #0 { ; SI: buffer_store_dword [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f32_1_2(float addrspace(1)* %out, float addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds float, float addrspace(3)* %lds, i32 %add.x.0 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 @@ -50,7 +50,7 @@ define void @simple_read2st64_f32_1_2(float addrspace(1)* %out, float addrspace( ; SI: buffer_store_dword [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f32_max_offset(float addrspace(1)* %out, float addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds float, float addrspace(3)* %lds, i32 %add.x.0 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 @@ -70,7 +70,7 @@ define void @simple_read2st64_f32_max_offset(float addrspace(1)* %out, float add ; SI: ds_read_b32 {{v[0-9]+}}, [[BIGADD]] ; SI: s_endpgm define void @simple_read2st64_f32_over_max_offset(float addrspace(1)* %out, float addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds float, float addrspace(3)* %lds, i32 %add.x.0 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 @@ -87,7 +87,7 @@ define void @simple_read2st64_f32_over_max_offset(float addrspace(1)* %out, floa ; SI-NOT: ds_read2st64_b32 ; SI: s_endpgm define void @odd_invalid_read2st64_f32_0(float addrspace(1)* %out) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i %val0 = load float, float addrspace(3)* %arrayidx0, align 4 %add.x = add nsw i32 %x.i, 63 @@ -103,7 +103,7 @@ define void @odd_invalid_read2st64_f32_0(float addrspace(1)* %out) #0 { ; SI-NOT: ds_read2st64_b32 ; SI: s_endpgm define void @odd_invalid_read2st64_f32_1(float addrspace(1)* %out) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x.0 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 @@ -123,7 +123,7 @@ define void @odd_invalid_read2st64_f32_1(float addrspace(1)* %out) #0 { ; SI: buffer_store_dwordx2 [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f64_0_1(double addrspace(1)* %out) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx0 = getelementptr inbounds [512 x double], [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %x.i %val0 = load double, double addrspace(3)* %arrayidx0, align 8 %add.x = add nsw i32 %x.i, 64 @@ -142,7 +142,7 @@ define void @simple_read2st64_f64_0_1(double addrspace(1)* %out) #0 { ; SI: buffer_store_dwordx2 [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f64_1_2(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %add.x.0 %val0 = load double, double addrspace(3)* %arrayidx0, align 8 @@ -162,7 +162,7 @@ define void @simple_read2st64_f64_1_2(double addrspace(1)* %out, double addrspac ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset0:128 offset1:129 ; SI: s_endpgm define void @misaligned_read2st64_f64(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %x.i %val0 = load double, double addrspace(3)* %arrayidx0, align 4 %add.x = add nsw i32 %x.i, 64 @@ -182,7 +182,7 @@ define void @misaligned_read2st64_f64(double addrspace(1)* %out, double addrspac ; SI: buffer_store_dwordx2 [[RESULT]] ; SI: s_endpgm define void @simple_read2st64_f64_max_offset(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 256 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %add.x.0 %val0 = load double, double addrspace(3)* %arrayidx0, align 8 @@ -202,7 +202,7 @@ define void @simple_read2st64_f64_max_offset(double addrspace(1)* %out, double a ; SI: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, [[BIGADD]] ; SI: s_endpgm define void @simple_read2st64_f64_over_max_offset(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %add.x.0 %val0 = load double, double addrspace(3)* %arrayidx0, align 8 @@ -219,7 +219,7 @@ define void @simple_read2st64_f64_over_max_offset(double addrspace(1)* %out, dou ; SI-NOT: ds_read2st64_b64 ; SI: s_endpgm define void @invalid_read2st64_f64_odd_offset(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %add.x.0 = add nsw i32 %x.i, 64 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %add.x.0 %val0 = load double, double addrspace(3)* %arrayidx0, align 8 @@ -240,7 +240,7 @@ define void @invalid_read2st64_f64_odd_offset(double addrspace(1)* %out, double ; SI: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:8 ; SI: s_endpgm define void @byte_size_only_divisible_64_read2_f64(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { - %x.i = tail call i32 @llvm.r600.read.tidig.x() #1 + %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx0 = getelementptr inbounds double, double addrspace(3)* %lds, i32 %x.i %val0 = load double, double addrspace(3)* %arrayidx0, align 8 %add.x = add nsw i32 %x.i, 8 @@ -253,16 +253,10 @@ define void @byte_size_only_divisible_64_read2_f64(double addrspace(1)* %out, do } ; Function Attrs: nounwind readnone -declare i32 @llvm.r600.read.tgid.x() #1 +declare i32 @llvm.amdgcn.workitem.id.x() #1 ; Function Attrs: nounwind readnone -declare i32 @llvm.r600.read.tgid.y() #1 - -; Function Attrs: nounwind readnone -declare i32 @llvm.r600.read.tidig.x() #1 - -; Function Attrs: nounwind readnone -declare i32 @llvm.r600.read.tidig.y() #1 +declare i32 @llvm.amdgcn.workitem.id.y() #1 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } |