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| author | Michael Liao <michael.hliao@gmail.com> | 2019-11-01 15:49:41 -0400 |
|---|---|---|
| committer | Michael Liao <michael.hliao@gmail.com> | 2019-11-01 17:06:17 -0400 |
| commit | 4531aee2ac1609e8ddf4f3deec200c5f793faa7b (patch) | |
| tree | 20b6e2ef9aec2437c6f1c6d65079279e970e5b52 /llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll | |
| parent | 16ec00eee7e348767f4393f189044f87f6374031 (diff) | |
| download | bcm5719-llvm-4531aee2ac1609e8ddf4f3deec200c5f793faa7b.tar.gz bcm5719-llvm-4531aee2ac1609e8ddf4f3deec200c5f793faa7b.zip | |
[amdgpu] Fix known bits compuation on `MUL_I24`/`MUL_U24`.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, dstuttard, tpr, t-tye, hiraditya, llvm-commits, yaxunl
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69735
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll b/llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll index 125f76ae10e..6f3659cbd94 100644 --- a/llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll +++ b/llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll @@ -157,3 +157,14 @@ define i32 @num_sign_bits_mul_i32_10(i32 %x, i32 %y, i32 %z, i32 %w) { %mul2 = mul i32 %mul0, %mul1 ret i32 %mul2 } + +; GFX9-LABEL: known_bits_mul24: +; GFX9: v_mov_b32_e32 v0, 0 +; GFX9-NEXT: s_setpc_b64 +define i32 @known_bits_mul24() { + %r0 = call i32 @llvm.amdgcn.mul.i24(i32 0, i32 -7) + %r1 = shl i32 %r0, 2 + ret i32 %r1 +} + +declare i32 @llvm.amdgcn.mul.i24(i32, i32) |
